linux-dev/drivers/clk/rockchip/clk.c, branch linus/master

clk: rockchip: re-add rational best approximation algorithm to the fractional divider

2022-02-23T23:07:16Z

In commit 4e7cf74fa3b2 ("clk: fractional-divider: Export approximation algorithm to the CCF users"), the code handling the rational best approximation algorithm was replaced by a call to the core clk_fractional_divider_general_approximation function which did the same thing back then. However, in commit 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag"), this common code was made conditional on CLK_FRAC_DIVIDER_POWER_OF_TWO_PS flag which was not added back to the rockchip clock driver. This broke the ltk050h3146w-a2 MIPI DSI display present on a PX30-based downstream board. Let's add the flag to the fractional divider flags so that the original and intended behavior is brought back to the rockchip clock drivers. Fixes: 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag") Cc: stable@vger.kernel.org Cc: Quentin Schulz Signed-off-by: Quentin Schulz Link: https://lore.kernel.org/r/20220131163224.708002-1-quentin.schulz@theobroma-systems.com Signed-off-by: Heiko Stuebner

clk: fractional-divider: Export approximation algorithm to the CCF users

2021-08-12T19:41:47Z

At least one user currently duplicates some functions that are provided by fractional divider module. Let's export approximation algorithm and replace the open-coded variant. As a bonus the exported function will get better documentation in place. Signed-off-by: Andy Shevchenko Tested-by: Heiko Stuebner Acked-by: Heiko Stuebner Link: https://lore.kernel.org/r/20210812170025.67074-1-andriy.shevchenko@linux.intel.com [sboyd@kernel.org: Add header guard because why not] Signed-off-by: Stephen Boyd

clk: rockchip: Demote non-conformant kernel-doc headers in main clock code

2021-01-25T23:24:04Z

Fixes the following W=1 kernel build warning(s): drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'name' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'parent_names' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'num_parents' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'base' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'muxdiv_offset' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'mux_shift' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'mux_width' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'mux_flags' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'div_offset' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'div_shift' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'div_width' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'div_flags' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'div_table' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'gate_offset' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'gate_shift' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'gate_flags' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'flags' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:45: warning: Function parameter or member 'lock' not described in 'rockchip_clk_register_branch' drivers/clk/rockchip/clk.c:180: warning: Function parameter or member 'hw' not described in 'rockchip_fractional_approximation' drivers/clk/rockchip/clk.c:180: warning: Function parameter or member 'rate' not described in 'rockchip_fractional_approximation' drivers/clk/rockchip/clk.c:180: warning: Function parameter or member 'parent_rate' not described in 'rockchip_fractional_approximation' drivers/clk/rockchip/clk.c:180: warning: Function parameter or member 'm' not described in 'rockchip_fractional_approximation' drivers/clk/rockchip/clk.c:180: warning: Function parameter or member 'n' not described in 'rockchip_fractional_approximation' Cc: Michael Turquette Cc: Stephen Boyd Cc: Heiko Stuebner Cc: Xing Zheng Cc: Thomas Abraham Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: Lee Jones Link: https://lore.kernel.org/r/20210120093040.1719407-2-lee.jones@linaro.org Signed-off-by: Heiko Stuebner

clk: rockchip: Remove redundant null check before clk_prepare_enable

2020-11-29T19:02:58Z

Because clk_prepare_enable() already checked NULL clock parameter, so the additional check is unnecessary, just remove it. Signed-off-by: Xu Wang Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20201127090551.50254-1-vulab@iscas.ac.cn Signed-off-by: Heiko Stuebner

clk: rockchip: Export some clock common APIs for module drivers

2020-09-22T13:16:38Z

This is used by the Rockchip clk driver, export it to allow that driver to be compiled as a module. Signed-off-by: Elaine Zhang Reviewed-by: Kever Yang Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200914022225.23613-5-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner

clk: rockchip: Use clk_hw_register_composite instead of clk_register_composite calls

2020-09-22T13:16:37Z

clk_hw_register_composite it's already exported. Preparation for compilation of rK common clock drivers into modules. Reported-by: kernel test robot Signed-off-by: Elaine Zhang Reviewed-by: Kever Yang Reviewed-by: Heiko Stuebner Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20200914022225.23613-2-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30T18:26:37Z

Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Richard Fontana Reviewed-by: Kate Stewart Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman

clk: Remove io.h from clk-provider.h

2019-05-15T20:21:37Z

Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__io_virt\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\<__ioremap\>' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' --or \ -e '\' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven Cc: Chen-Yu Tsai Acked-by: Maxime Ripard Acked-by: Tero Kristo Acked-by: Sekhar Nori Cc: Krzysztof Kozlowski Acked-by: Mark Brown Cc: Chris Zankel Acked-by: Max Filippov Acked-by: John Crispin Acked-by: Heiko Stuebner Signed-off-by: Stephen Boyd

clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type

2019-04-12T20:34:18Z

The div offset of some clocks are different from their mux offset and the COMPOSITE clock-type require that div and mux offset are the same, so add a new COMPOSITE_DIV_OFFSET clock-type to handle that. Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner

clk: rockchip: add support for half divider

2018-07-06T17:17:57Z

The new Rockchip socs have optional half divider: The formula is shown as: freq_out = 2*freq_in / (2*div + 3) Is this the same for all of new SoCs. So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \ DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV" to hook that special divider clock-type into our clock-tree. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner