<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/sifive/Kconfig, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/sifive/Kconfig?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/sifive/Kconfig?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-17T21:07:11Z</updated>
<entry>
<title>clk: sifive: select by default if SOC_SIFIVE</title>
<updated>2022-10-17T21:07:11Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-10-05T17:13:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7e3e6e1b75c9643e25e8ca7d6caf1b1faf8f022e'/>
<id>urn:sha1:7e3e6e1b75c9643e25e8ca7d6caf1b1faf8f022e</id>
<content type='text'>
With the aim of dropping direct selects of drivers from Kconfig.socs,
default the SiFive clock drivers to the value of SOC_SIFIVE.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20221005171348.167476-2-conor@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sifive: Use reset-simple in prci driver for PCIe driver</title>
<updated>2021-05-04T11:26:09Z</updated>
<author>
<name>Greentime Hu</name>
<email>greentime.hu@sifive.com</email>
</author>
<published>2021-05-04T10:59:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e4d368e0b632717e57d064ade6afdcf535e58068'/>
<id>urn:sha1:e4d368e0b632717e57d064ade6afdcf535e58068</id>
<content type='text'>
We use reset-simple in this patch so that pcie driver can use
devm_reset_control_get() to get this reset data structure and use
reset_control_deassert() to deassert pcie_power_up_rst_n.

Link: https://lore.kernel.org/r/20210504105940.100004-3-greentime.hu@sifive.com
Signed-off-by: Greentime Hu &lt;greentime.hu@sifive.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sifive: Add a driver for the SiFive FU740 PRCI IP block</title>
<updated>2020-12-16T20:22:59Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-12-09T09:49:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=efc91ae43c8d4bbf64e4b9a28113b24a74ffd58d'/>
<id>urn:sha1:efc91ae43c8d4bbf64e4b9a28113b24a74ffd58d</id>
<content type='text'>
Add driver code for the SiFive FU740 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU740 device and
implements SoC-level clock tree controls and dividers.

The link of unmatched as follow, and the U740-C000 manual would
be present in the same page as soon.
https://www.sifive.com/boards/hifive-unmatched

This driver contains bug fixes and contributions from
Henry Styles &lt;hes@sifive.com&gt;
Erik Danie &lt;erik.danie@sifive.com&gt;
Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Pragnesh Patel &lt;Pragnesh.patel@sifive.com&gt;
Acked-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
Cc: Henry Styles &lt;hes@sifive.com&gt;
Cc: Erik Danie &lt;erik.danie@sifive.com&gt;
Cc: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Link: https://lore.kernel.org/r/20201209094916.17383-4-zong.li@sifive.com
[sboyd@kernel.org: Include header to silence sparse]
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sifive: Use common name for prci configuration</title>
<updated>2020-12-16T20:22:59Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-12-09T09:49:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=28108fc8a056f0fd26be17727eff212fae67a247'/>
<id>urn:sha1:28108fc8a056f0fd26be17727eff212fae67a247</id>
<content type='text'>
Use generic name CLK_SIFIVE_PRCI instead of CLK_SIFIVE_FU540_PRCI. This
patch is prepared for fu740 support.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
Acked-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
Reviewed-by: Pragnesh Patel &lt;Pragnesh.patel@sifive.com&gt;
Link: https://lore.kernel.org/r/20201209094916.17383-3-zong.li@sifive.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sifive: restrict Kconfig scope for the FU540 PRCI driver</title>
<updated>2019-05-21T18:34:45Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul.walmsley@sifive.com</email>
</author>
<published>2019-05-13T21:30:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f7df8c92b4b90a891972fb782b3eaac836efa601'/>
<id>urn:sha1:f7df8c92b4b90a891972fb782b3eaac836efa601</id>
<content type='text'>
Restrict Kconfig scope for SiFive clock and reset IP block drivers
such that they won't appear on most configurations that are unlikely
to support them.  This is based on a suggestion from Pavel Machek
&lt;pavel@ucw.cz&gt;.  Ideally this should be dependent on
CONFIG_ARCH_SIFIVE, but since that Kconfig directive does not yet
exist, add dependencies on RISCV or COMPILE_TEST for now.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Reported-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Acked-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: sifive: add a driver for the SiFive FU540 PRCI IP block</title>
<updated>2019-05-03T16:20:56Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul.walmsley@sifive.com</email>
</author>
<published>2019-04-30T20:51:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=30b8e27e3b581a173779e52096237ed19172eaf4'/>
<id>urn:sha1:30b8e27e3b581a173779e52096237ed19172eaf4</id>
<content type='text'>
Add driver code for the SiFive FU540 PRCI IP block.  This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra &lt;wesley@sifive.com&gt;:
https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

This version includes several changes requested by Stephen Boyd
&lt;sboyd@kernel.org&gt;.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: Wesley W. Terpstra &lt;wesley@sifive.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Megan Wachs &lt;megan@sifive.com&gt;
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-clk@vger.kernel.org
[sboyd@kernel.org: Fix some const and ARRAY_SIZE() issues, make makefile
only descend if CLK_SIFIVE=y]
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
