<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/tegra/clk.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/tegra/clk.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/tegra/clk.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-12-15T17:55:21Z</updated>
<entry>
<title>clk: tegra: Support runtime PM and power domain</title>
<updated>2021-12-15T17:55:21Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-11-30T23:23:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b1bc04a2ac5b15e0b681228376664671fc2f2017'/>
<id>urn:sha1:b1bc04a2ac5b15e0b681228376664671fc2f2017</id>
<content type='text'>
The Clock-and-Reset controller resides in a core power domain on NVIDIA
Tegra SoCs.  In order to support voltage scaling of the core power domain,
we hook up DVFS-capable clocks to the core GENPD for managing of the
GENPD's performance state based on the clock changes.

Some clocks don't have any specific physical hardware unit that backs
them, like root PLLs and system clock and they have theirs own voltage
requirements.  This patch adds new clk-device driver that backs the clocks
and provides runtime PM functionality for them.  A virtual clk-device is
created for each such DVFS-capable clock at the clock's registration time
by the new tegra_clk_register() helper.  Driver changes clock's device
GENPD performance state based on clk-rate notifications.

In result we have this sequence of events:

  1. Clock driver creates virtual device for selective clocks, enables
     runtime PM for the created device and registers the clock.
  2. Clk-device driver starts to listen to clock rate changes.
  3. Something changes clk rate or enables/disables clk.
  4. CCF core propagates the change through the clk tree.
  5. Clk-device driver gets clock rate-change notification or GENPD core
     handles prepare/unprepare of the clock.
  6. Clk-device driver changes GENPD performance state on clock rate
     change.
  7. GENPD driver changes voltage regulator state change.
  8. The regulator state is committed to hardware via I2C.

We rely on fact that DVFS is not needed for Tegra I2C and that Tegra I2C
driver already keeps clock always-prepared.  Hence I2C subsystem stays
independent from the clk power management and there are no deadlock spots
in the sequence.

Currently all clocks are registered very early during kernel boot when the
device driver core isn't available yet.  The clk-device can't be created
at that time.  This patch splits the registration of the clocks in two
phases:

  1. Register all essential clocks which don't use RPM and are needed
     during early boot.

  2. Register at a later boot time the rest of clocks.

This patch adds power management support for Tegra20 and Tegra30 clocks.

Reviewed-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt; # Ouya T30
Tested-by: Paul Fertser &lt;fercerpav@gmail.com&gt; # PAZ00 T20
Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt; # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar &lt;mattmerhar@protonmail.com&gt; # Ouya T30
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Fix double-free in tegra_clk_init()</title>
<updated>2019-12-24T08:01:06Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2019-12-10T02:05:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fc666936f3f0faeebe32b5f0b0fc49a6d0087c6c'/>
<id>urn:sha1:fc666936f3f0faeebe32b5f0b0fc49a6d0087c6c</id>
<content type='text'>
It's unlikely to happen in practice ever, but makes static checkers happy.

Fixes: 535f296d47de ("clk: tegra: Add suspend and resume support on Tegra210")
Reported-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lkml.kernel.org/r/20191210020512.6088-1-digetx@gmail.com
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Add suspend and resume support on Tegra210</title>
<updated>2019-11-11T13:53:04Z</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2019-08-16T19:42:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=535f296d47de327287fe65b5843713bd9b01a267'/>
<id>urn:sha1:535f296d47de327287fe65b5843713bd9b01a267</id>
<content type='text'>
All the CAR controller settings are lost on suspend when core power goes
off. This implement saving and restoring context for all PLLs and clocks
during system suspend and resume to have the clocks back to same state
for normal operation.

Clock driver suspend and resume are registered as syscore_ops as clocks
restore need to happen before the other drivers resume to have all their
clocks back to the same state as before suspend.

Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Share clk and rst register defines with Tegra clock driver</title>
<updated>2019-11-11T13:53:04Z</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2019-08-16T19:41:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3214be6cb1e487b0f8c3bb2eac9b06df07a07e06'/>
<id>urn:sha1:3214be6cb1e487b0f8c3bb2eac9b06df07a07e06</id>
<content type='text'>
Move CLK_OUT_ENB and RST_DEVICES registers to clk.h to share these with
Tegra clock driver.

Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: clk-super: Fix to enable PLLP branches to CPU</title>
<updated>2019-11-11T13:53:03Z</updated>
<author>
<name>Sowjanya Komatineni</name>
<email>skomatineni@nvidia.com</email>
</author>
<published>2019-08-16T19:41:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=68a14a5634dacb37d18618d62f0410f1ec69ab28'/>
<id>urn:sha1:68a14a5634dacb37d18618d62f0410f1ec69ab28</id>
<content type='text'>
This patch has a fix to enable PLLP branches to CPU before changing
the CPU cluster clock source to PLLP for Gen5 Super clock and
disables PLLP branches to CPU when not in use.

During system suspend entry and exit, CPU source will be switched
to PLLP and this needs PLLP branches to be enabled to CPU prior to
the switch.

On system resume, warmboot code enables PLLP branches to CPU and
powers up the CPU with PLLP clock source.

Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Sowjanya Komatineni &lt;skomatineni@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201</title>
<updated>2019-05-30T18:29:52Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-28T17:10:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9952f6918daa4ab5fc81307a9f90e31a4df3b200'/>
<id>urn:sha1:9952f6918daa4ab5fc81307a9f90e31a4df3b200</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Steve Winslow &lt;swinslow@gmail.com&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clk: Remove io.h from clk-provider.h</title>
<updated>2019-05-15T20:21:37Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2019-04-18T22:20:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=62e59c4e69b3cdbad67e3c2d49e4df4cfe1679e3'/>
<id>urn:sha1:62e59c4e69b3cdbad67e3c2d49e4df4cfe1679e3</id>
<content type='text'>
Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.

Found with this grep:

  git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
  	xargs git grep -l \
	-e '\&lt;__iowrite32_copy\&gt;' --or \
	-e '\&lt;__ioread32_copy\&gt;' --or \
	-e '\&lt;__iowrite64_copy\&gt;' --or \
	-e '\&lt;ioremap_page_range\&gt;' --or \
	-e '\&lt;ioremap_huge_init\&gt;' --or \
	-e '\&lt;arch_ioremap_pud_supported\&gt;' --or \
	-e '\&lt;arch_ioremap_pmd_supported\&gt;' --or \
	-e '\&lt;devm_ioport_map\&gt;' --or \
	-e '\&lt;devm_ioport_unmap\&gt;' --or \
	-e '\&lt;IOMEM_ERR_PTR\&gt;' --or \
	-e '\&lt;devm_ioremap\&gt;' --or \
	-e '\&lt;devm_ioremap_nocache\&gt;' --or \
	-e '\&lt;devm_ioremap_wc\&gt;' --or \
	-e '\&lt;devm_iounmap\&gt;' --or \
	-e '\&lt;devm_ioremap_release\&gt;' --or \
	-e '\&lt;devm_memremap\&gt;' --or \
	-e '\&lt;devm_memunmap\&gt;' --or \
	-e '\&lt;__devm_memremap_pages\&gt;' --or \
	-e '\&lt;pci_remap_cfgspace\&gt;' --or \
	-e '\&lt;arch_has_dev_port\&gt;' --or \
	-e '\&lt;arch_phys_wc_add\&gt;' --or \
	-e '\&lt;arch_phys_wc_del\&gt;' --or \
	-e '\&lt;memremap\&gt;' --or \
	-e '\&lt;memunmap\&gt;' --or \
	-e '\&lt;arch_io_reserve_memtype_wc\&gt;' --or \
	-e '\&lt;arch_io_free_memtype_wc\&gt;' --or \
	-e '\&lt;__io_aw\&gt;' --or \
	-e '\&lt;__io_pbw\&gt;' --or \
	-e '\&lt;__io_paw\&gt;' --or \
	-e '\&lt;__io_pbr\&gt;' --or \
	-e '\&lt;__io_par\&gt;' --or \
	-e '\&lt;__raw_readb\&gt;' --or \
	-e '\&lt;__raw_readw\&gt;' --or \
	-e '\&lt;__raw_readl\&gt;' --or \
	-e '\&lt;__raw_readq\&gt;' --or \
	-e '\&lt;__raw_writeb\&gt;' --or \
	-e '\&lt;__raw_writew\&gt;' --or \
	-e '\&lt;__raw_writel\&gt;' --or \
	-e '\&lt;__raw_writeq\&gt;' --or \
	-e '\&lt;readb\&gt;' --or \
	-e '\&lt;readw\&gt;' --or \
	-e '\&lt;readl\&gt;' --or \
	-e '\&lt;readq\&gt;' --or \
	-e '\&lt;writeb\&gt;' --or \
	-e '\&lt;writew\&gt;' --or \
	-e '\&lt;writel\&gt;' --or \
	-e '\&lt;writeq\&gt;' --or \
	-e '\&lt;readb_relaxed\&gt;' --or \
	-e '\&lt;readw_relaxed\&gt;' --or \
	-e '\&lt;readl_relaxed\&gt;' --or \
	-e '\&lt;readq_relaxed\&gt;' --or \
	-e '\&lt;writeb_relaxed\&gt;' --or \
	-e '\&lt;writew_relaxed\&gt;' --or \
	-e '\&lt;writel_relaxed\&gt;' --or \
	-e '\&lt;writeq_relaxed\&gt;' --or \
	-e '\&lt;readsb\&gt;' --or \
	-e '\&lt;readsw\&gt;' --or \
	-e '\&lt;readsl\&gt;' --or \
	-e '\&lt;readsq\&gt;' --or \
	-e '\&lt;writesb\&gt;' --or \
	-e '\&lt;writesw\&gt;' --or \
	-e '\&lt;writesl\&gt;' --or \
	-e '\&lt;writesq\&gt;' --or \
	-e '\&lt;inb\&gt;' --or \
	-e '\&lt;inw\&gt;' --or \
	-e '\&lt;inl\&gt;' --or \
	-e '\&lt;outb\&gt;' --or \
	-e '\&lt;outw\&gt;' --or \
	-e '\&lt;outl\&gt;' --or \
	-e '\&lt;inb_p\&gt;' --or \
	-e '\&lt;inw_p\&gt;' --or \
	-e '\&lt;inl_p\&gt;' --or \
	-e '\&lt;outb_p\&gt;' --or \
	-e '\&lt;outw_p\&gt;' --or \
	-e '\&lt;outl_p\&gt;' --or \
	-e '\&lt;insb\&gt;' --or \
	-e '\&lt;insw\&gt;' --or \
	-e '\&lt;insl\&gt;' --or \
	-e '\&lt;outsb\&gt;' --or \
	-e '\&lt;outsw\&gt;' --or \
	-e '\&lt;outsl\&gt;' --or \
	-e '\&lt;insb_p\&gt;' --or \
	-e '\&lt;insw_p\&gt;' --or \
	-e '\&lt;insl_p\&gt;' --or \
	-e '\&lt;outsb_p\&gt;' --or \
	-e '\&lt;outsw_p\&gt;' --or \
	-e '\&lt;outsl_p\&gt;' --or \
	-e '\&lt;ioread8\&gt;' --or \
	-e '\&lt;ioread16\&gt;' --or \
	-e '\&lt;ioread32\&gt;' --or \
	-e '\&lt;ioread64\&gt;' --or \
	-e '\&lt;iowrite8\&gt;' --or \
	-e '\&lt;iowrite16\&gt;' --or \
	-e '\&lt;iowrite32\&gt;' --or \
	-e '\&lt;iowrite64\&gt;' --or \
	-e '\&lt;ioread16be\&gt;' --or \
	-e '\&lt;ioread32be\&gt;' --or \
	-e '\&lt;ioread64be\&gt;' --or \
	-e '\&lt;iowrite16be\&gt;' --or \
	-e '\&lt;iowrite32be\&gt;' --or \
	-e '\&lt;iowrite64be\&gt;' --or \
	-e '\&lt;ioread8_rep\&gt;' --or \
	-e '\&lt;ioread16_rep\&gt;' --or \
	-e '\&lt;ioread32_rep\&gt;' --or \
	-e '\&lt;ioread64_rep\&gt;' --or \
	-e '\&lt;iowrite8_rep\&gt;' --or \
	-e '\&lt;iowrite16_rep\&gt;' --or \
	-e '\&lt;iowrite32_rep\&gt;' --or \
	-e '\&lt;iowrite64_rep\&gt;' --or \
	-e '\&lt;__io_virt\&gt;' --or \
	-e '\&lt;pci_iounmap\&gt;' --or \
	-e '\&lt;virt_to_phys\&gt;' --or \
	-e '\&lt;phys_to_virt\&gt;' --or \
	-e '\&lt;ioremap_uc\&gt;' --or \
	-e '\&lt;ioremap\&gt;' --or \
	-e '\&lt;__ioremap\&gt;' --or \
	-e '\&lt;iounmap\&gt;' --or \
	-e '\&lt;ioremap\&gt;' --or \
	-e '\&lt;ioremap_nocache\&gt;' --or \
	-e '\&lt;ioremap_uc\&gt;' --or \
	-e '\&lt;ioremap_wc\&gt;' --or \
	-e '\&lt;ioremap_wc\&gt;' --or \
	-e '\&lt;ioremap_wt\&gt;' --or \
	-e '\&lt;ioport_map\&gt;' --or \
	-e '\&lt;ioport_unmap\&gt;' --or \
	-e '\&lt;ioport_map\&gt;' --or \
	-e '\&lt;ioport_unmap\&gt;' --or \
	-e '\&lt;xlate_dev_kmem_ptr\&gt;' --or \
	-e '\&lt;xlate_dev_mem_ptr\&gt;' --or \
	-e '\&lt;unxlate_dev_mem_ptr\&gt;' --or \
	-e '\&lt;virt_to_bus\&gt;' --or \
	-e '\&lt;bus_to_virt\&gt;' --or \
	-e '\&lt;memset_io\&gt;' --or \
	-e '\&lt;memcpy_fromio\&gt;' --or \
	-e '\&lt;memcpy_toio\&gt;'

I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.

Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@bootlin.com&gt;
Acked-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Acked-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Cc: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Acked-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: John Crispin &lt;john@phrozen.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: kzalloc() -&gt; kcalloc()</title>
<updated>2018-06-12T23:19:22Z</updated>
<author>
<name>Kees Cook</name>
<email>keescook@chromium.org</email>
</author>
<published>2018-06-12T21:03:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6396bb221514d2876fd6dc0aa2a1f240d99b37bb'/>
<id>urn:sha1:6396bb221514d2876fd6dc0aa2a1f240d99b37bb</id>
<content type='text'>
The kzalloc() function has a 2-factor argument form, kcalloc(). This
patch replaces cases of:

        kzalloc(a * b, gfp)

with:
        kcalloc(a * b, gfp)

as well as handling cases of:

        kzalloc(a * b * c, gfp)

with:

        kzalloc(array3_size(a, b, c), gfp)

as it's slightly less ugly than:

        kzalloc_array(array_size(a, b), c, gfp)

This does, however, attempt to ignore constant size factors like:

        kzalloc(4 * 1024, gfp)

though any constants defined via macros get caught up in the conversion.

Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.

The Coccinelle script used for this was:

// Fix redundant parens around sizeof().
@@
type TYPE;
expression THING, E;
@@

(
  kzalloc(
-	(sizeof(TYPE)) * E
+	sizeof(TYPE) * E
  , ...)
|
  kzalloc(
-	(sizeof(THING)) * E
+	sizeof(THING) * E
  , ...)
)

// Drop single-byte sizes and redundant parens.
@@
expression COUNT;
typedef u8;
typedef __u8;
@@

(
  kzalloc(
-	sizeof(u8) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(__u8) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(char) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(unsigned char) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(u8) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(__u8) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(char) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(unsigned char) * COUNT
+	COUNT
  , ...)
)

// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@

(
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (COUNT_ID)
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * COUNT_ID
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (COUNT_CONST)
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * COUNT_CONST
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (COUNT_ID)
+	COUNT_ID, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * COUNT_ID
+	COUNT_ID, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (COUNT_CONST)
+	COUNT_CONST, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * COUNT_CONST
+	COUNT_CONST, sizeof(THING)
  , ...)
)

// 2-factor product, only identifiers.
@@
identifier SIZE, COUNT;
@@

- kzalloc
+ kcalloc
  (
-	SIZE * COUNT
+	COUNT, SIZE
  , ...)

// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@

(
  kzalloc(
-	sizeof(TYPE) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(THING) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
)

// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@

(
  kzalloc(
-	sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  kzalloc(
-	sizeof(THING1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(THING1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
)

// 3-factor product, only identifiers, with redundant parens removed.
@@
identifier STRIDE, SIZE, COUNT;
@@

(
  kzalloc(
-	(COUNT) * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
)

// Any remaining multi-factor products, first at least 3-factor products,
// when they're not all constants...
@@
expression E1, E2, E3;
constant C1, C2, C3;
@@

(
  kzalloc(C1 * C2 * C3, ...)
|
  kzalloc(
-	(E1) * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	(E1) * (E2) * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	(E1) * (E2) * (E3)
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	E1 * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
)

// And then all remaining 2 factors products when they're not all constants,
// keeping sizeof() as the second factor argument.
@@
expression THING, E1, E2;
type TYPE;
constant C1, C2, C3;
@@

(
  kzalloc(sizeof(THING) * C2, ...)
|
  kzalloc(sizeof(TYPE) * C2, ...)
|
  kzalloc(C1 * C2 * C3, ...)
|
  kzalloc(C1 * C2, ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (E2)
+	E2, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * E2
+	E2, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (E2)
+	E2, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * E2
+	E2, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	(E1) * E2
+	E1, E2
  , ...)
|
- kzalloc
+ kcalloc
  (
-	(E1) * (E2)
+	E1, E2
  , ...)
|
- kzalloc
+ kcalloc
  (
-	E1 * E2
+	E1, E2
  , ...)
)

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20</title>
<updated>2018-05-18T10:35:28Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-05-08T16:26:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5d797111afe12e488e08432fd9b372fae2cc7e93'/>
<id>urn:sha1:5d797111afe12e488e08432fd9b372fae2cc7e93</id>
<content type='text'>
CDEV1 and CDEV2 clocks are a bit special case, their parent clock is
created by the pinctrl driver. It should be possible for clk user to
request these clocks before pinctrl driver got probed and hence user will
get an orphaned clock. That might be undesirable because user may expect
parent clock to be enabled by the child, so let's return -EPROBE_DEFER
till parent clock appears.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Implement reset control reset</title>
<updated>2017-03-20T13:15:31Z</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2017-03-02T14:16:16Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4236e752f19d4dae372336859a18ca8a5bed9374'/>
<id>urn:sha1:4236e752f19d4dae372336859a18ca8a5bed9374</id>
<content type='text'>
For completeness, also implement this reset framework API for Tegra.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Reviewed-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Reviewed-by: Arto Merilainen &lt;amerilainen@nvidia.com&gt;
Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
