<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/tegra, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/tegra?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/tegra?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-14T20:44:24Z</updated>
<entry>
<title>clk: tegra: Fix Tegra PWM parent clock</title>
<updated>2022-10-14T20:44:24Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2022-10-10T10:00:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c461c677a8cb19026fd06741a23ff32d0759342b'/>
<id>urn:sha1:c461c677a8cb19026fd06741a23ff32d0759342b</id>
<content type='text'>
Commit 8c193f4714df ("pwm: tegra: Optimize period calculation") updated
the period calculation in the Tegra PWM driver and now returns an error
if the period requested is less than minimum period supported. This is
breaking PWM support on various Tegra platforms. For example, on the
Tegra210 Jetson Nano platform this is breaking the PWM fan support and
probing the PWM fan driver now fails ...

 pwm-fan pwm-fan: Failed to configure PWM: -22
 pwm-fan: probe of pwm-fan failed with error -22

The problem is that the default parent clock for the PWM on Tegra210 is
a 32kHz clock and is unable to support the requested PWM period.

Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.

Fixes: 8c193f4714df ("pwm: tegra: Optimize period calculation")
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Robert Eckelmann &lt;longnoserob@gmail.com&gt; # TF101 T20
Tested-by: Antoni Aloy Torrens &lt;aaloytorrens@gmail.com&gt; # TF101 T20
Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # TF201 T30
Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt; # TF700T T3
Link: https://lore.kernel.org/r/20221010100046.6477-1-jonathanh@nvidia.com
Acked-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'clk-ofnode', 'clk-bindings', 'clk-cleanup', 'clk-zynq' and 'clk-xilinx' into clk-next</title>
<updated>2022-10-04T17:53:04Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2022-10-04T17:53:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=49f4c2d101bbf93c62e3fa58e666f71352c54121'/>
<id>urn:sha1:49f4c2d101bbf93c62e3fa58e666f71352c54121</id>
<content type='text'>
 - Miscellaneous of_node_put() fixes
 - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
 - Convert gpio-clk-gate binding to YAML
 - Various fixes to AMD/Xilinx Zynqmp clk driver
 - Graduate AMD/Xilinx "clocking wizard" driver from staging

* clk-ofnode:
  clk: ti: Balance of_node_get() calls for of_find_node_by_name()
  clk: tegra20: Fix refcount leak in tegra20_clock_init
  clk: tegra: Fix refcount leak in tegra114_clock_init
  clk: tegra: Fix refcount leak in tegra210_clock_init
  clk: sprd: Hold reference returned by of_get_parent()
  clk: berlin: Add of_node_put() for of_get_parent()
  clk: at91: dt-compat: Hold reference returned by of_get_parent()
  clk: qoriq: Hold reference returned by of_get_parent()
  clk: oxnas: Hold reference returned by of_get_parent()
  clk: st: Hold reference returned by of_get_parent()
  clk: tegra: Add missing of_node_put()
  clk: meson: Hold reference returned by of_get_parent()
  clk: nomadik: Add missing of_node_put()

* clk-bindings:
  dt-bindings: clock: drop minItems equal to maxItems
  dt-bindings: clock: gpio-gate-clock: Convert to json-schema
  dt-bindings: clock: Move versaclock.h to dt-bindings/clock
  dt-bindings: clock: Move lochnagar.h to dt-bindings/clock

* clk-cleanup:
  clk: allow building lan966x as a module
  clk: clk-xgene: simplify if-if to if-else
  clk: nxp: fix typo in comment
  clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
  clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
  clkdev: Simplify devm_clk_hw_register_clkdev() function
  clkdev: Remove never used devm_clk_release_clkdev()
  clk: Remove never used devm_of_clk_del_provider()
  clk: pistachio: Fix initconst confusion
  clk: clk-npcm7xx: Remove unused struct npcm7xx_clk_gate_data and npcm7xx_clk_div_fixed_data
  clk: do not initialize ret
  clk: remove extra empty line
  clk: Fix comment typo
  clk: move from strlcpy with unused retval to strscpy

* clk-zynq:
  clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate
  clk: zynqmp: Check the return type zynqmp_pm_query_data
  clk: zynqmp: Add a check for NULL pointer
  clk: zynqmp: Replaced strncpy() with strscpy()
  clk: zynqmp: Fix stack-out-of-bounds in strncpy`
  clk: zynqmp: make bestdiv unsigned

* clk-xilinx:
  clk: clocking-wizard: Depend on HAS_IOMEM
  clk: clocking-wizard: Use dev_err_probe() helper
  clk: clocking-wizard: Update the compatible
  clk: clocking-wizard: Fix the reconfig for 5.2
  clk: clocking-wizard: Rename nr-outputs to xlnx,nr-outputs
  clk: clocking-wizard: Move clocking-wizard out
  dt-bindings: add documentation of xilinx clocking wizard
</content>
</entry>
<entry>
<title>clk: tegra20: Fix refcount leak in tegra20_clock_init</title>
<updated>2022-08-23T02:06:09Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-05-23T15:28:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4e343bafe03ff68a62f48f8235cf98f2c685468b'/>
<id>urn:sha1:4e343bafe03ff68a62f48f8235cf98f2c685468b</id>
<content type='text'>
of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: 37c26a906527 ("clk: tegra: add clock support for Tegra20")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Link: https://lore.kernel.org/r/20220523152811.19692-1-linmq006@gmail.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Fix refcount leak in tegra114_clock_init</title>
<updated>2022-08-23T02:05:35Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-05-23T14:38:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=db16a80c76ea395766913082b1e3f939dde29b2c'/>
<id>urn:sha1:db16a80c76ea395766913082b1e3f939dde29b2c</id>
<content type='text'>
of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: 2cb5efefd6f7 ("clk: tegra: Implement clocks for Tegra114")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Link: https://lore.kernel.org/r/20220523143834.7587-1-linmq006@gmail.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Fix refcount leak in tegra210_clock_init</title>
<updated>2022-08-23T02:05:02Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-05-23T14:26:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=56c78cb1f00a9dde8cd762131ce8f4c5eb046fbb'/>
<id>urn:sha1:56c78cb1f00a9dde8cd762131ce8f4c5eb046fbb</id>
<content type='text'>
of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: 6b301a059eb2 ("clk: tegra: Add support for Tegra210 clocks")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Link: https://lore.kernel.org/r/20220523142608.65074-1-linmq006@gmail.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: move from strlcpy with unused retval to strscpy</title>
<updated>2022-08-22T23:22:53Z</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2022-08-18T21:00:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c19edff61210eb846bf8ec44c9f87d1ca9efdfd2'/>
<id>urn:sha1:c19edff61210eb846bf8ec44c9f87d1ca9efdfd2</id>
<content type='text'>
Follow the advice of the below link and prefer 'strscpy' in this
subsystem. Conversion is 1:1 because the return value is not used.
Generated by a coccinelle script.

Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20220818210000.6600-1-wsa+renesas@sang-engineering.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Add missing of_node_put()</title>
<updated>2022-08-19T21:30:28Z</updated>
<author>
<name>Liang He</name>
<email>windhl@126.com</email>
</author>
<published>2022-06-17T01:59:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=02bd544f98ae96e2f8fde759696f725f0966cce6'/>
<id>urn:sha1:02bd544f98ae96e2f8fde759696f725f0966cce6</id>
<content type='text'>
In tegra124_132_clock_init_pre() and tegra30_clock_init(),
of_find_matching_node() will return a node pointer with
refcount incremented. We should use of_node_put() when it
is not used anymore.

Signed-off-by: Liang He &lt;windhl@126.com&gt;
Link: https://lore.kernel.org/r/20220617015918.4001865-1-windhl@126.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Update kerneldoc to match prototypes</title>
<updated>2022-05-06T08:56:00Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-05-06T08:56:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6f6baf690c3b8c41083d7443ab6a5645b96ff91b'/>
<id>urn:sha1:6f6baf690c3b8c41083d7443ab6a5645b96ff91b</id>
<content type='text'>
For some DFLL functions, the kerneldoc comments don't match the function
prototype. Fix them up to avoid some warnings at build time.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Replace .round_rate() with .determine_rate()</title>
<updated>2022-05-04T09:30:51Z</updated>
<author>
<name>Rajkumar Kasirajan</name>
<email>rkasirajan@nvidia.com</email>
</author>
<published>2022-04-06T15:17:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6a7ace2b99706a17b3f38e0114172abaeb00f240'/>
<id>urn:sha1:6a7ace2b99706a17b3f38e0114172abaeb00f240</id>
<content type='text'>
Replace the .round_rate() callback with .determine_rate() which can
consider max_rate imposed by clk_set_max_rate() while rounding the clock
rate.

Note that if the .determine_rate() callback is defined it will be called
instead of the .round_rate() callback when calling clk_round_rate(). By
using .determine_rate(), the maximum rate returned when calling
clk_round_rate() is now limited by the current max_rate.

Signed-off-by: Rajkumar Kasirajan &lt;rkasirajan@nvidia.com&gt;
[jonathanh@nvidia.com: checkpatch fixes and commit message update]
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>clk: tegra: Register clocks from root to leaf</title>
<updated>2022-05-04T09:30:32Z</updated>
<author>
<name>Timo Alho</name>
<email>talho@nvidia.com</email>
</author>
<published>2022-04-06T15:17:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2db12b15c6f3e41ae2f2b3bb15627f28d1eaf715'/>
<id>urn:sha1:2db12b15c6f3e41ae2f2b3bb15627f28d1eaf715</id>
<content type='text'>
Current clock initialization causes intermediate registering of orphan
clocks (i.e. a clock without a parent registered). CCF keeps track of
orphan clocks and any time a new clock is registered, it will loop
through the list of orphan and queries if the parent is now available.
This operation triggers one or more clock operations, which are IPCs
with BPMP-FW. Hence, due to the order in which the clocks appear
currently, this causes &gt; 5000 IPC messages to be sent to BPMP-FW during
clock initialization.

Optimize the clock probing by registering clocks hierarchically from
root clock towards leafs.

Signed-off-by: Timo Alho &lt;talho@nvidia.com&gt;
[jonathanh@nvidia.com: checkpatch fixes]
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
