linux-dev/drivers/clk/ti, branch master

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2022-10-08T17:06:48Z

Pull clk updates from Stephen Boyd: "We have some late breaking reports that a patch series to rework clk rate range support broke boot on some devices, so I've left that branch out of this. Hopefully we can get to that next week, or punt on it and let it bake another cycle. That means we don't really have any changes to the core framework this time around besides a few typo fixes. Instead this is all clk driver updates and fixes. The usual suspects are here (again), with Qualcomm dominating the diffstat. We look to have gained support for quite a few new Qualcomm SoCs and Dmitry worked on updating many of the existing Qualcomm drivers to use clk_parent_data. After that we have MediaTek drivers getting some much needed updates, in particular to support GPU DVFS. There are also quite a few Samsung clk driver patches, but that's mostly because there was a maintainer change and so last release we missed some of those patches. Overall things look normal, but I'm slowly reviewing core framework code nowadays and that shows given the rate range patches had to be yanked last minute. Let's hope this situation changes soon. New Drivers: - Support for Renesas VersaClock7 clock generator family - Add Spreadtrum UMS512 SoC clk support - New clock drivers for MediaTek Helio X10 MT6795 - Display clks for Qualcomm SM6115, SM8450 - GPU clks for Qualcomm SC8280XP - Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers Deleted Drivers: - Remove DaVinci DM644x and DM646x clk driver support Updates: - Convert Baikal-T1 CCU driver to platform driver - Split reset support out of primary Baikal-T1 CCU driver - Add some missing clks required for RPiVid Video Decoder on RaspberryPi - Mark PLLC critical on bcm2835 - More devm helpers for fixed rate registration - Various PXA168 clk driver fixes - Add resets for MediaTek MT8195 PCIe and USB - Miscellaneous of_node_put() fixes - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock - Convert gpio-clk-gate binding to YAML - Various fixes to AMD/Xilinx Zynqmp clk driver - Graduate AMD/Xilinx "clocking wizard" driver from staging - Add missing DPI1_HDMI clock in MT8195 VDOSYS1 - Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195 - Fix GPU clock topology on MT8195 - Propogate rate changes from GPU clock gate up the tree - Clock mux notifiers for GPU-related PLLs - Conversion of more "simple" drivers to mtk_clk_simple_probe() - Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers - Fixes to previous |struct clk| to |struct clk_hw| conversion on MediaTek - Shrink MT8192 clock driver by deduplicating clock parent lists - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk' clocks for i.MX8MP - Drop unnecessary newline in i.MX8MM dt-bindings - Add more MU1 and SAI clocks dt-bindings Ids - Introduce slice busy bit check for i.MX93 composite clock - Introduce white list bit check for i.MX93 composite clock - Add new i.MX93 clock gate - Add MU1 and MU2 clocks to i.MX93 clock provider - Add SAI IPG clocks to i.MX93 clock provider - add generic clocks for U(S)ART available on SAMA5D2 SoCs - reset controller support for Polarfire clocks - .round_rate and .set rate support for clk-mpfs - code cleanup for clk-mpfs - PLL support for PolarFire SoC's Clock Conditioning Circuitry - Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car V4H - Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8 - Add I2C clocks and resets on RZ/V2M - Document clock support for the RZ/Five SoC - mux-variant clock using the table variant to select parents - clock controller for the rv1126 soc - conversion of rk3128 to yaml and relicensing of the yaml bindings to gpl2+MIT (following dt-binding guildelines) - Exynos7885: add FSYS, TREX and MFC clock controllers - Exynos850: add IS and AUD (audio) clock controllers with bindings - ExynosAutov9: add FSYS clock controllers with bindings - ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock controllers, due to duplicated entries. This is an acceptable ABI break: recently developed/added platform so without legacies, acked by known users/developers - ExynosAutov9: add few missing Peric 0/1 gates - ExynosAutov9: correct register offsets of few Peric 0/1 clocks - Minor code improvements (use of_device_get_match_data() helper, code style) - Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he already maintainers that architecture/platform - Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving retention issues during suspend of USB on Qualcomm sc7180/sc7280 and SC8280XP - Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration - Qualcomm SDM660 SDCC1 moved to floor clk ops - Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018 was added/fixed - The Qualcomm MSM8996 CPU clocks are updated with support for ACD - Support for Qualcomm SDM670 GCC and RPMh clks was added - Transition to parent_data, parent_hws and use of ARRAY_SIZE() for num_parents was done for many Qualcomm SoCs - Support for per-reset defined delay on Qualcomm was introduced" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits) clk: qcom: gcc-sm6375: Ensure unsigned long type clk: qcom: gcc-sm6375: Remove unused variables clk: qcom: kpss-xcc: convert to parent data API clk: introduce (devm_)hw_register_mux_parent_data_table API clk: allow building lan966x as a module clk: clk-xgene: simplify if-if to if-else clk: ast2600: BCLK comes from EPLL clk: clocking-wizard: Depend on HAS_IOMEM clk: clocking-wizard: Use dev_err_probe() helper clk: nxp: fix typo in comment clk: pxa: add a check for the return value of kzalloc() clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975 dt-bindings: clock: vc5: Add 5P49V6975 clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe clk: Renesas versaclock7 ccf device driver dt-bindings: Renesas versaclock7 device tree bindings clk: ti: Balance of_node_get() calls for of_find_node_by_name() clk: imx: scu: fix memleak on platform_device_add() fails clk: vc5: Use regmap_{set,clear}_bits() where appropriate ...

Merge branches 'clk-ofnode', 'clk-bindings', 'clk-cleanup', 'clk-zynq' and 'clk-xilinx' into clk-next

2022-10-04T17:53:04Z

- Miscellaneous of_node_put() fixes - Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock - Convert gpio-clk-gate binding to YAML - Various fixes to AMD/Xilinx Zynqmp clk driver - Graduate AMD/Xilinx "clocking wizard" driver from staging * clk-ofnode: clk: ti: Balance of_node_get() calls for of_find_node_by_name() clk: tegra20: Fix refcount leak in tegra20_clock_init clk: tegra: Fix refcount leak in tegra114_clock_init clk: tegra: Fix refcount leak in tegra210_clock_init clk: sprd: Hold reference returned by of_get_parent() clk: berlin: Add of_node_put() for of_get_parent() clk: at91: dt-compat: Hold reference returned by of_get_parent() clk: qoriq: Hold reference returned by of_get_parent() clk: oxnas: Hold reference returned by of_get_parent() clk: st: Hold reference returned by of_get_parent() clk: tegra: Add missing of_node_put() clk: meson: Hold reference returned by of_get_parent() clk: nomadik: Add missing of_node_put() * clk-bindings: dt-bindings: clock: drop minItems equal to maxItems dt-bindings: clock: gpio-gate-clock: Convert to json-schema dt-bindings: clock: Move versaclock.h to dt-bindings/clock dt-bindings: clock: Move lochnagar.h to dt-bindings/clock * clk-cleanup: clk: allow building lan966x as a module clk: clk-xgene: simplify if-if to if-else clk: nxp: fix typo in comment clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe clkdev: Simplify devm_clk_hw_register_clkdev() function clkdev: Remove never used devm_clk_release_clkdev() clk: Remove never used devm_of_clk_del_provider() clk: pistachio: Fix initconst confusion clk: clk-npcm7xx: Remove unused struct npcm7xx_clk_gate_data and npcm7xx_clk_div_fixed_data clk: do not initialize ret clk: remove extra empty line clk: Fix comment typo clk: move from strlcpy with unused retval to strscpy * clk-zynq: clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate clk: zynqmp: Check the return type zynqmp_pm_query_data clk: zynqmp: Add a check for NULL pointer clk: zynqmp: Replaced strncpy() with strscpy() clk: zynqmp: Fix stack-out-of-bounds in strncpy` clk: zynqmp: make bestdiv unsigned * clk-xilinx: clk: clocking-wizard: Depend on HAS_IOMEM clk: clocking-wizard: Use dev_err_probe() helper clk: clocking-wizard: Update the compatible clk: clocking-wizard: Fix the reconfig for 5.2 clk: clocking-wizard: Rename nr-outputs to xlnx,nr-outputs clk: clocking-wizard: Move clocking-wizard out dt-bindings: add documentation of xilinx clocking wizard

clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe

2022-10-01T00:39:46Z

pm_runtime_get_sync() will increment pm usage counter. Forgetting to putting operation will result in reference leak. Add missing pm_runtime_put_sync in some error paths. Fixes: 9ac33b0ce81f ("CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)") Signed-off-by: Miaoqian Lin Link: https://lore.kernel.org/r/20220602030838.52057-1-linmq006@gmail.com Reviewed-by: Tony Lindgren Signed-off-by: Stephen Boyd

clk: ti: Balance of_node_get() calls for of_find_node_by_name()

2022-10-01T00:14:32Z

In ti_find_clock_provider(), of_find_node_by_name() will call of_node_put() for the 'from' argument, possibly putting the node one too many times. Let's maintain the of_node_get() from the previous search and only put when we're exiting the function early. This should avoid a misbalanced reference count on the node. Fixes: 51f661ef9a10 ("clk: ti: Add ti_find_clock_provider() to use clock-output-names") Signed-off-by: Liang He Link: https://lore.kernel.org/r/20220915031121.4003589-1-windhl@126.com [sboyd@kernel.org: Rewrite commit text, maintain reference instead of get again] Signed-off-by: Stephen Boyd

clk: ti: Fix missing of_node_get() ti_find_clock_provider()

2022-08-19T21:21:55Z

For ti_find_clock_provider() we want to return the np with refcount incremented. However we are missing of_node_get() for the clock-output-names case that causes refcount warnings. Fixes: 51f661ef9a10 ("clk: ti: Add ti_find_clock_provider() to use clock-output-names") Signed-off-by: Tony Lindgren Link: https://lore.kernel.org/r/20220621091118.33930-1-tony@atomide.com Signed-off-by: Stephen Boyd

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2022-08-05T01:40:08Z

Pull clk updates from Stephen Boyd: "The clk core gains a new set of APIs that allow drivers to both acquire clks and prepare and enable them at the same time. This also comes with devm support so that drivers can make a single call to get and prepare and enable the clk and have that all undone when their driver is removed. Many folks have requested this feature over the years, but we've had disagreements about how to implement it and if it was worthwhile to encourage drivers to use such an API. Now it's here, so let's see how it goes. I hope that by introducing this API we can identify drivers that would benefit from further consolidation of clk API usage, possibly by moving such logic to the bus layer and out of drivers altogether. Outside of that major API update, we have the usual collection of driver updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time around. Then we have the long tail of non-critical fixes and minor feature additions to various clk drivers. And finally more clk provider migration to struct clk_parent_data, reducing boot times in the process. Summary: Core: - devm helpers for clk_get() + clk_prepare() and clk_enable() New Drivers: - Support for the camera clock controller in Qualcomm SM8450 and the display and gpu clock controllers in Qualcomm SM8350 - Add support for the Renesas RZ/Five SoC Updates: - Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074 - Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916 GCC driver - Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe GDSCs - Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation - Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are migrated to use clk_parent_data - Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and SM8250 - Qualcomm MSM8916 gains more possible frequencies for its GP clocks. - The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the design in IPQ8074 to allow the GCC driver to probe earlier. - The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped, as the only upstream target that adapted this interface was transitioned several kernel versions ago - Qualcomm GDSCs found to be enabled at boot will now reflect in the enable count of the supply, as was done with the regulator supplies previously - Correct adc1, nic_media and edma1's parents for NXP i.MX93 - rdiv, mfd values, the return rate in recalc_rate and add more frequencies in the table for fracn-gppll on i.MX - Remove Allwinner workaround logic/compatible in fixed factor code - MediaTek clk driver cleanups - Add reset support to more MediaTek clk drivers - deduplicate Allwinner ccu_clks arrays - Allwinner H6 GPU DFS support - Adjust Allwinner Kconfig to limit choice - Fix initconst confusion on Renesas R-Car Gen4 - Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L - Add PFC and WDT clocks and resets on Renesas RZ/V2M - Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on Renesas R-Car S4-8" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits) clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw() clk: mux: Introduce devm_clk_hw_register_mux_parent_hws() clk: divider: Introduce devm_clk_hw_register_divider_parent_hw() clk: qcom: gcc-msm8994: use parent_hws for gpll0/4 clk: qcom: clk-rpm: convert to parent_data API dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled clk: qcom: Drop mmcx gdsc supply for dispcc and videocc clk: qcom: fix build error initializer element is not constant clk: sprd: Add dt-bindings include file for UMS512 dt-bindings: clk: sprd: Add bindings for ums512 clock controller clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources clk: qcom: add support for SM8350 DISPCC ...

clk: ti: Stop using legacy clkctrl names for omap4 and 5

2022-06-16T07:49:57Z

With the addition of clock-output-names, we can now unify the internal clock naming for omap4 and 5 to follow the other TI SoCs. We are still using legacy clkctrl names for omap4 and 5 based on the clock manager name which is wrong. Instead, we want to use the clkctrl clock based naming. We must now also drop the legacy TI_CLK_CLKCTRL_COMPAT quirk for the clkctrl clock. This change will allow further devicetree warning cleanup as already done for am3/4 and dra7. Cc: linux-clk@vger.kernel.org Cc: Stephen Boyd Cc: Tero Kristo Signed-off-by: Tony Lindgren Link: https://lore.kernel.org/r/20220615064306.22254-1-tony@atomide.com Signed-off-by: Stephen Boyd

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE

2022-06-10T12:51:36Z

Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 1)

2022-06-10T12:51:35Z

Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

clk: ti: clkctrl: replace usage of found with dedicated list iterator variable

2022-05-21T03:40:58Z

To move the list iterator variable into the list_for_each_entry_*() macro in the future it should be avoided to use the list iterator variable after the loop body. To *never* use the list iterator variable after the loop it was concluded to use a separate iterator variable instead of a found boolean [1]. This removes the need to use a found variable and simply checking if the variable was set, can determine if the break/goto was hit. Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cWXJ6w@mail.gmail.com/ Signed-off-by: Jakob Koschel Link: https://lore.kernel.org/r/20220324071019.59483-1-jakobkoschel@gmail.com Tested-by: Tony Lindgren Reviewed-by: Tony Lindgren Signed-off-by: Stephen Boyd