<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/clk/zynqmp, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/clk/zynqmp?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/clk/zynqmp?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-08-30T22:05:59Z</updated>
<entry>
<title>clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rate</title>
<updated>2022-08-30T22:05:59Z</updated>
<author>
<name>Quanyang Wang</name>
<email>quanyang.wang@windriver.com</email>
</author>
<published>2022-08-26T14:20:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=30eaf02149ecc3c5815e45d27187bf09e925071d'/>
<id>urn:sha1:30eaf02149ecc3c5815e45d27187bf09e925071d</id>
<content type='text'>
The function zynqmp_pll_round_rate is used to find a most appropriate
PLL frequency which the hardware can generate according to the desired
frequency. For example, if the desired frequency is 297MHz, considering
the limited range from PS_PLL_VCO_MIN (1.5GHz) to PS_PLL_VCO_MAX (3.0GHz)
of PLL, zynqmp_pll_round_rate should return 1.872GHz (297MHz * 5).

There are two problems with the current code of zynqmp_pll_round_rate:

1) When the rate is below PS_PLL_VCO_MIN, it can't find a correct rate
when the parameter "rate" is an integer multiple of *prate, in other words,
if "f" is zero, zynqmp_pll_round_rate won't return a valid frequency which
is from PS_PLL_VCO_MIN to PS_PLL_VCO_MAX. For example, *prate is 33MHz
and the rate is 660MHz, zynqmp_pll_round_rate will not boost up rate and
just return 660MHz, and this will cause clk_calc_new_rates failure since
zynqmp_pll_round_rate returns an invalid rate out of its boundaries.

2) Even if the rate is higher than PS_PLL_VCO_MIN, there is still a risk
that zynqmp_pll_round_rate returns an invalid rate because the function
DIV_ROUND_CLOSEST makes some loss in the fractional part. If the parent
clock *prate is 33333333Hz and we want to set the PLL rate to 1.5GHz,
this function will return 1499999985Hz by using the formula below:
    value = *prate * DIV_ROUND_CLOSEST(rate, *prate)).
This value is also invalid since it's slightly smaller than PS_PLL_VCO_MIN.
because DIV_ROUND_CLOSEST makes some loss in the fractional part.

Signed-off-by: Quanyang Wang &lt;quanyang.wang@windriver.com&gt;
Link: https://lore.kernel.org/r/20220826142030.213805-1-quanyang.wang@windriver.com
Reviewed-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@amd.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Check the return type zynqmp_pm_query_data</title>
<updated>2022-08-23T00:01:05Z</updated>
<author>
<name>Shubhrajyoti Datta</name>
<email>shubhrajyoti.datta@xilinx.com</email>
</author>
<published>2022-04-06T09:22:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8bdb15cd05d4365dfb75978d885328ebdeb5875e'/>
<id>urn:sha1:8bdb15cd05d4365dfb75978d885328ebdeb5875e</id>
<content type='text'>
Check the return type of zynqmp_pm_query_data(qdata, ret_payload);

Addresses-Coverity: Event check_return
Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Link: https://lore.kernel.org/r/20220406092211.19017-1-shubhrajyoti.datta@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Add a check for NULL pointer</title>
<updated>2022-08-23T00:01:05Z</updated>
<author>
<name>Shubhrajyoti Datta</name>
<email>shubhrajyoti.datta@xilinx.com</email>
</author>
<published>2022-05-18T05:53:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6ab9810cfe6c8f3d8b8750c827d7870abd3751b9'/>
<id>urn:sha1:6ab9810cfe6c8f3d8b8750c827d7870abd3751b9</id>
<content type='text'>
Add a NULL pointer check as clk_hw_get_parent can return NULL.

Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Link: https://lore.kernel.org/r/20220518055314.2486-1-shubhrajyoti.datta@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Replaced strncpy() with strscpy()</title>
<updated>2022-08-23T00:01:05Z</updated>
<author>
<name>Shubhrajyoti Datta</name>
<email>shubhrajyoti.datta@xilinx.com</email>
</author>
<published>2022-05-10T07:01:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=acc1c732f35bb3a26177e54cd3de27e3524426e4'/>
<id>urn:sha1:acc1c732f35bb3a26177e54cd3de27e3524426e4</id>
<content type='text'>
Replaced strncpy() with strscpy() as the clock names are supposed to
be NULL terminated.

Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Link: https://lore.kernel.org/r/20220510070154.29528-2-shubhrajyoti.datta@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Fix stack-out-of-bounds in strncpy`</title>
<updated>2022-08-23T00:01:05Z</updated>
<author>
<name>Ian Nam</name>
<email>young.kwan.nam@xilinx.com</email>
</author>
<published>2022-05-10T07:01:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dd80fb2dbf1cd8751efbe4e53e54056f56a9b115'/>
<id>urn:sha1:dd80fb2dbf1cd8751efbe4e53e54056f56a9b115</id>
<content type='text'>
"BUG: KASAN: stack-out-of-bounds in strncpy+0x30/0x68"

Linux-ATF interface is using 16 bytes of SMC payload. In case clock name is
longer than 15 bytes, string terminated NULL character will not be received
by Linux. Add explicit NULL character at last byte to fix issues when clock
name is longer.

This fixes below bug reported by KASAN:

 ==================================================================
 BUG: KASAN: stack-out-of-bounds in strncpy+0x30/0x68
 Read of size 1 at addr ffff0008c89a7410 by task swapper/0/1

 CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.4.0-00396-g81ef9e7-dirty #3
 Hardware name: Xilinx Versal vck190 Eval board revA (QSPI) (DT)
 Call trace:
  dump_backtrace+0x0/0x1e8
  show_stack+0x14/0x20
  dump_stack+0xd4/0x108
  print_address_description.isra.0+0xbc/0x37c
  __kasan_report+0x144/0x198
  kasan_report+0xc/0x18
  __asan_load1+0x5c/0x68
  strncpy+0x30/0x68
  zynqmp_clock_probe+0x238/0x7b8
  platform_drv_probe+0x6c/0xc8
  really_probe+0x14c/0x418
  driver_probe_device+0x74/0x130
  __device_attach_driver+0xc4/0xe8
  bus_for_each_drv+0xec/0x150
  __device_attach+0x160/0x1d8
  device_initial_probe+0x10/0x18
  bus_probe_device+0xe0/0xf0
  device_add+0x528/0x950
  of_device_add+0x5c/0x80
  of_platform_device_create_pdata+0x120/0x168
  of_platform_bus_create+0x244/0x4e0
  of_platform_populate+0x50/0xe8
  zynqmp_firmware_probe+0x370/0x3a8
  platform_drv_probe+0x6c/0xc8
  really_probe+0x14c/0x418
  driver_probe_device+0x74/0x130
  device_driver_attach+0x94/0xa0
  __driver_attach+0x70/0x108
  bus_for_each_dev+0xe4/0x158
  driver_attach+0x30/0x40
  bus_add_driver+0x21c/0x2b8
  driver_register+0xbc/0x1d0
  __platform_driver_register+0x7c/0x88
  zynqmp_firmware_driver_init+0x1c/0x24
  do_one_initcall+0xa4/0x234
  kernel_init_freeable+0x1b0/0x24c
  kernel_init+0x10/0x110
  ret_from_fork+0x10/0x18

 The buggy address belongs to the page:
 page:ffff0008f9be1c88 refcount:0 mapcount:0 mapping:0000000000000000 index:0x0
 raw: 0008d00000000000 ffff0008f9be1c90 ffff0008f9be1c90 0000000000000000
 raw: 0000000000000000 0000000000000000 00000000ffffffff
 page dumped because: kasan: bad access detected

 addr ffff0008c89a7410 is located in stack of task swapper/0/1 at offset 112 in frame:
  zynqmp_clock_probe+0x0/0x7b8

 this frame has 3 objects:
  [32, 44) 'response'
  [64, 80) 'ret_payload'
  [96, 112) 'name'

 Memory state around the buggy address:
  ffff0008c89a7300: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  ffff0008c89a7380: 00 00 00 00 f1 f1 f1 f1 00 04 f2 f2 00 00 f2 f2
 &gt;ffff0008c89a7400: 00 00 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00
                          ^
  ffff0008c89a7480: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
  ffff0008c89a7500: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ==================================================================

Signed-off-by: Ian Nam &lt;young.kwan.nam@xilinx.com&gt;
Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Link: https://lore.kernel.org/r/20220510070154.29528-3-shubhrajyoti.datta@xilinx.com
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: make bestdiv unsigned</title>
<updated>2022-08-22T23:54:14Z</updated>
<author>
<name>Shubhrajyoti Datta</name>
<email>shubhrajyoti.datta@amd.com</email>
</author>
<published>2022-08-18T11:31:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d3954b51b475c4848179cd90b24ac73684cdc76b'/>
<id>urn:sha1:d3954b51b475c4848179cd90b24ac73684cdc76b</id>
<content type='text'>
Divisor is always positive make it u32 *.
Also the arguments passed are currently of u32 pointers.

Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@amd.com&gt;
Link: https://lore.kernel.org/r/20220818113153.14431-1-shubhrajyoti.datta@amd.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: replace warn_once with pr_debug for failed clock ops</title>
<updated>2022-01-25T01:18:23Z</updated>
<author>
<name>Michael Tretter</name>
<email>m.tretter@pengutronix.de</email>
</author>
<published>2022-01-19T11:54:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4917394e0c765e89787ed8e296a0706cac51440d'/>
<id>urn:sha1:4917394e0c765e89787ed8e296a0706cac51440d</id>
<content type='text'>
The warning that a clock operation failed is only printed once. However,
the function is called for various different clocks. The limit hides the
warnings if different clocks are affected by the failures.

The clock ops might fail if the firmware that handles the clocks is
misconfigured. Therefore, replace the pr_warn_once with pr_debug to
allow the user to see all errors if necessary. By default, hide the
error messages and let drivers handle the errors.

Signed-off-by: Michael Tretter &lt;m.tretter@pengutronix.de&gt;
Link: https://lore.kernel.org/r/20220119115434.2042017-1-m.tretter@pengutronix.de
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next</title>
<updated>2021-09-01T22:27:07Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2021-09-01T22:27:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=47505bf3a82166c3576155c229e941af922bf147'/>
<id>urn:sha1:47505bf3a82166c3576155c229e941af922bf147</id>
<content type='text'>
* clk-kirkwood:
  clk: kirkwood: Fix a clocking boot regression

* clk-imx:
  clk: imx8mn: Add M7 core clock
  clk: imx8m: fix clock tree update of TF-A managed clocks
  clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate
  clk: imx8mn: use correct mux type for clkout path
  clk: imx8mm: use correct mux type for clkout path

* clk-doc:
  dt-bindings: clock: samsung: fix header path in example
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: sama7g5: remove all kernel-doc &amp; kernel-doc warnings
  clk: zynqmp: fix kernel doc

* clk-zynq:
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type

* clk-ralink:
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
</content>
</entry>
<entry>
<title>clk: zynqmp: Fix kernel-doc format</title>
<updated>2021-08-29T06:43:17Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-08-23T11:33:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6e1cc688e4501c129ff4e0f001588e2859c5be33'/>
<id>urn:sha1:6e1cc688e4501c129ff4e0f001588e2859c5be33</id>
<content type='text'>
Align structure and function names with definitions.

Issues are reported by kernel-doc script as:
drivers/clk/zynqmp/clk-gate-zynqmp.c:24: warning: expecting prototype for
struct clk_gate. Prototype was for struct zynqmp_clk_gate instead
drivers/clk/zynqmp/clk-gate-zynqmp.c:75: warning: expecting prototype for
zynqmp_clk_gate_is_enable(). Prototype was for zynqmp_clk_gate_is_enabled()
instead

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/26526e144296373b2c75e75865dd023158f9bfc7.1629718424.git.michal.simek@xilinx.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: zynqmp: Fix a memory leak</title>
<updated>2021-08-29T04:26:12Z</updated>
<author>
<name>Shubhrajyoti Datta</name>
<email>shubhrajyoti.datta@xilinx.com</email>
</author>
<published>2021-08-18T06:59:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e7296d16ef7be11a6001be9bd89906ef55ab2405'/>
<id>urn:sha1:e7296d16ef7be11a6001be9bd89906ef55ab2405</id>
<content type='text'>
Fix a memory leak of mux.

Signed-off-by: Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;
Link: https://lore.kernel.org/r/20210818065929.12835-3-shubhrajyoti.datta@xilinx.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
</feed>
