<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/coresight, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/coresight?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/coresight?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2015-04-03T14:17:04Z</updated>
<entry>
<title>coresight: moving to new "hwtracing" directory</title>
<updated>2015-04-03T14:17:04Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-03-30T20:13:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=01081f5ab9916603555f236b11f76bb00e4e01e9'/>
<id>urn:sha1:01081f5ab9916603555f236b11f76bb00e4e01e9</id>
<content type='text'>
Keeping drivers related to HW tracing on ARM, i.e coresight,
under "drivers/coresight" doesn't make sense when other
architectures start rolling out technologies of the same
nature.

As such creating a new "drivers/hwtracing" directory where all
drivers of the same kind can reside, reducing namespace
pollution under "drivers/".

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight-tmc: Adding a status interface to sysfs</title>
<updated>2015-04-03T14:17:04Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-03-30T20:13:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a2d6e1849329b7735f2872af4221727c7b9502dd'/>
<id>urn:sha1:a2d6e1849329b7735f2872af4221727c7b9502dd</id>
<content type='text'>
Knowing the state of various control register is always
useful for degging and tuning.  As such add an entry in
sysfs that expose to userspace the most important registers.

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: adding the LINKSINK block as a sink type</title>
<updated>2015-04-03T14:17:03Z</updated>
<author>
<name>Xia Kaixu</name>
<email>kaixu.xia@linaro.org</email>
</author>
<published>2015-03-30T20:13:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a0a500efab41c761a1d1fd919d2e42a3a3545b2e'/>
<id>urn:sha1:a0a500efab41c761a1d1fd919d2e42a3a3545b2e</id>
<content type='text'>
&gt;From the TMC TRM, the ETF can be configured as buffer mode, so ETF can
be a sink type.

Signed-off-by: Xia Kaixu &lt;kaixu.xia@linaro.org&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: Adding coresight support for arm64 architecture</title>
<updated>2015-04-03T14:17:03Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-03-30T20:13:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3288731e628e0269c20d86e43b647d0b92f2b3fc'/>
<id>urn:sha1:3288731e628e0269c20d86e43b647d0b92f2b3fc</id>
<content type='text'>
Most CoreSight blocks are 64-bit ready.  As such move configuration
entries from "arch/arm/Kconfig.config" to the driver's subdirectory
and source the newly created Kconfig from architecture specific
Kconfig.debug files.

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: fixing compilation warnings picked up by 64bit compiler</title>
<updated>2015-04-03T14:17:03Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-03-30T20:13:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=72f641fe6818a403aed52fb3a5b8a241ff76c24f'/>
<id>urn:sha1:72f641fe6818a403aed52fb3a5b8a241ff76c24f</id>
<content type='text'>
Compiling coresight drivers with a 64-bit compiler highlights a couple
of formatting issues, which are fixed by this patch.

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: making cpu index lookup arm64 compliant</title>
<updated>2015-04-03T14:17:03Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-03-30T20:13:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8c02a5ba34a1fae6def8cb5a39bb582f09bca49c'/>
<id>urn:sha1:8c02a5ba34a1fae6def8cb5a39bb582f09bca49c</id>
<content type='text'>
Function "get_logical_index()" is not available on arm64.
Instead of adding the function simply using "of_get_cpu_node()" and
comparing the return value with cpu handles yields the same
result.

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight-replicator: constify of_device_id array</title>
<updated>2015-03-26T22:22:22Z</updated>
<author>
<name>Fabian Frederick</name>
<email>fabf@skynet.be</email>
</author>
<published>2015-03-16T19:20:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=160b7daab96636d089fee4e0487da49c70ca4e15'/>
<id>urn:sha1:160b7daab96636d089fee4e0487da49c70ca4e15</id>
<content type='text'>
of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)

Signed-off-by: Fabian Frederick &lt;fabf@skynet.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: fix function etm_writel_cp14() parameter order</title>
<updated>2015-02-04T18:42:55Z</updated>
<author>
<name>Kaixu Xia</name>
<email>xiakaixu@huawei.com</email>
</author>
<published>2015-01-26T16:22:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5fb31cd839c21130c0b2524ceb9244e98dfe10e3'/>
<id>urn:sha1:5fb31cd839c21130c0b2524ceb9244e98dfe10e3</id>
<content type='text'>
Function etm_writel_cp14() takes an offset and a value rather
than the other way around, something this patch is correcting.
The semantic remains the same since it is only a function stub.

Signed-off-by: Kaixu Xia &lt;xiakaixu@huawei.com&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight-etm: remove check for unknown Kconfig macro</title>
<updated>2015-02-04T18:42:55Z</updated>
<author>
<name>Paul Bolle</name>
<email>pebolle@tiscali.nl</email>
</author>
<published>2015-01-26T16:22:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=406b9f659fbc966ab47a1fe8f5c1a2e8110483ad'/>
<id>urn:sha1:406b9f659fbc966ab47a1fe8f5c1a2e8110483ad</id>
<content type='text'>
The CoreSight ETM/PTM driver contains a check for a
CONFIG_CORESIGHT_SOURCE_ETM_DEFAULT_ENABLE macro. But there's no related
Kconfig symbol CORESIGHT_SOURCE_ETM_DEFAULT_ENABLE. Remove that check
and the single line of code it hides.

Signed-off-by: Paul Bolle &lt;pebolle@tiscali.nl&gt;
Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>coresight: fixing CPU hwid lookup in device tree</title>
<updated>2015-02-04T18:42:55Z</updated>
<author>
<name>Mathieu Poirier</name>
<email>mathieu.poirier@linaro.org</email>
</author>
<published>2015-01-26T16:22:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=34a03c1d30f04ca7439c685c0ea9b7d79c353705'/>
<id>urn:sha1:34a03c1d30f04ca7439c685c0ea9b7d79c353705</id>
<content type='text'>
Some DT specification will represent CPU nodes with address
cells greater than one, making the current code fail.  Using
the proper retrieval helper function ensure the correct hwid
for CPUs is read properly with different address cell size.

Signed-off-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
