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<title>linux-dev/drivers/crypto/caam/intern.h, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/crypto/caam/intern.h?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/crypto/caam/intern.h?h=linus%2Fmaster'/>
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<updated>2022-05-28T01:06:49Z</updated>
<entry>
<title>Merge tag 'v5.19-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2022-05-28T01:06:49Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-05-28T01:06:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d075c0c1be279c5f4c6688ac0442fff6494e56bc'/>
<id>urn:sha1:d075c0c1be279c5f4c6688ac0442fff6494e56bc</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "API:

   - Test in-place en/decryption with two sglists in testmgr

   - Fix process vs softirq race in cryptd

  Algorithms:

   - Add arm64 acceleration for sm4

   - Add s390 acceleration for chacha20

  Drivers:

   - Add polarfire soc hwrng support in mpsf

   - Add support for TI SoC AM62x in sa2ul

   - Add support for ATSHA204 cryptochip in atmel-sha204a

   - Add support for PRNG in caam

   - Restore support for storage encryption in qat

   - Restore support for storage encryption in hisilicon/sec"

* tag 'v5.19-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits)
  hwrng: omap3-rom - fix using wrong clk_disable() in omap_rom_rng_runtime_resume()
  crypto: hisilicon/sec - delete the flag CRYPTO_ALG_ALLOCATES_MEMORY
  crypto: qat - add support for 401xx devices
  crypto: qat - re-enable registration of algorithms
  crypto: qat - honor CRYPTO_TFM_REQ_MAY_SLEEP flag
  crypto: qat - add param check for DH
  crypto: qat - add param check for RSA
  crypto: qat - remove dma_free_coherent() for DH
  crypto: qat - remove dma_free_coherent() for RSA
  crypto: qat - fix memory leak in RSA
  crypto: qat - add backlog mechanism
  crypto: qat - refactor submission logic
  crypto: qat - use pre-allocated buffers in datapath
  crypto: qat - set to zero DH parameters before free
  crypto: s390 - add crypto library interface for ChaCha20
  crypto: talitos - Uniform coding style with defined variable
  crypto: octeontx2 - simplify the return expression of otx2_cpt_aead_cbc_aes_sha_setkey()
  crypto: cryptd - Protect per-CPU resource by disabling BH.
  crypto: sun8i-ce - do not fallback if cryptlen is less than sg length
  crypto: sun8i-ce - rework debugging
  ...
</content>
</entry>
<entry>
<title>crypto: caam - determine whether CAAM supports blob encap/decap</title>
<updated>2022-05-23T15:47:50Z</updated>
<author>
<name>Ahmad Fatoum</name>
<email>a.fatoum@pengutronix.de</email>
</author>
<published>2022-05-13T14:57:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7a0e7d5265f58eab5983f6560817d4fe9943743b'/>
<id>urn:sha1:7a0e7d5265f58eab5983f6560817d4fe9943743b</id>
<content type='text'>
Depending on SoC variant, a CAAM may be available, but with some futures
fused out. The LS1028A (non-E) SoC is one such SoC and while it
indicates BLOB support, BLOB operations will ultimately fail, because
there is no AES support. Add a new blob_present member to reflect
whether both BLOB support and the AES support it depends on is
available.

These will be used in a follow-up commit to allow blob driver
initialization to error out on SoCs without the necessary hardware
support instead of failing at runtime with a cryptic

  caam_jr 8020000.jr: 20000b0f: CCB: desc idx 11: : Invalid CHA selected.

Co-developed-by: Michael Walle &lt;michael@walle.cc&gt;
Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Tested-by: Michael Walle &lt;michael@walle.cc&gt; # on ls1028a (non-E and E)
Signed-off-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt;
Reviewed-by: Pankaj Gupta &lt;pankaj.gupta@nxp.com&gt;
Signed-off-by: Jarkko Sakkinen &lt;jarkko@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: caam/rng - Add support for PRNG</title>
<updated>2022-05-06T10:16:55Z</updated>
<author>
<name>Meenakshi Aggarwal</name>
<email>meenakshi.aggarwal@nxp.com</email>
</author>
<published>2022-04-29T11:48:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0aa6ac7795cab3d8bcf3209d77459d595f4843da'/>
<id>urn:sha1:0aa6ac7795cab3d8bcf3209d77459d595f4843da</id>
<content type='text'>
Add support for random number generation using PRNG
mode of CAAM and expose the interface through crypto API.

According to the RM, the HW implementation of the DRBG follows
NIST SP 800-90A specification for DRBG_Hash SHA-256 function

Signed-off-by: Meenakshi Aggarwal &lt;meenakshi.aggarwal@nxp.com&gt;
Reviewed-by: Horia Geant &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - enable crypto-engine retry mechanism</title>
<updated>2020-11-06T03:29:11Z</updated>
<author>
<name>Iuliana Prodan</name>
<email>iuliana.prodan@nxp.com</email>
</author>
<published>2020-10-26T19:06:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2d653936eb2cf613526290caa512b46e4c0d71ae'/>
<id>urn:sha1:2d653936eb2cf613526290caa512b46e4c0d71ae</id>
<content type='text'>
Use the new crypto_engine_alloc_init_and_set() function to
initialize crypto-engine and enable retry mechanism.

Set the maximum size for crypto-engine software queue based on
Job Ring size (JOBR_DEPTH) and a threshold (reserved for the
non-crypto-API requests that are not passed through crypto-engine).

The callback for do_batch_requests is NULL, since CAAM
doesn't support linked requests.

Signed-off-by: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Move debugfs fops into standalone file</title>
<updated>2020-08-21T04:47:49Z</updated>
<author>
<name>Horia Geantă</name>
<email>horia.geanta@nxp.com</email>
</author>
<published>2020-08-06T18:09:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=abd9875497ba47e198fb565f11d5f332eeb08ab3'/>
<id>urn:sha1:abd9875497ba47e198fb565f11d5f332eeb08ab3</id>
<content type='text'>
Currently the debugfs fops are defined in caam/intern.h.  This causes
problems because it creates identical static functions and variables
in multiple files.  It also creates warnings when those files don't
use the fops.

This patch moves them into a standalone file, debugfs.c.

It also removes unnecessary uses of ifdefs on CONFIG_DEBUG_FS.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
[Moved most of debugfs-related operations into debugfs.c.]
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - drop global context pointer and init_done</title>
<updated>2020-03-30T00:50:49Z</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2020-03-19T16:12:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1517f63cd84f00da3a3e21dff042410b2799c1c3'/>
<id>urn:sha1:1517f63cd84f00da3a3e21dff042410b2799c1c3</id>
<content type='text'>
Leverage devres to get rid of code storing global context as well as
init_done flag.

Original code also has a circular deallocation dependency where
unregister_algs() -&gt; caam_rng_exit() -&gt; caam_jr_free() chain would
only happen if all of JRs were freed. Fix this by moving
caam_rng_exit() outside of unregister_algs() and doing it specifically
for JR that instantiated HWRNG.

Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Cc: Chris Healy &lt;cphealy@gmail.com&gt;
Cc: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Cc: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-imx@nxp.com
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - support crypto_engine framework for SKCIPHER algorithms</title>
<updated>2020-02-22T01:25:47Z</updated>
<author>
<name>Iuliana Prodan</name>
<email>iuliana.prodan@nxp.com</email>
</author>
<published>2020-02-12T17:55:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ee38767f152a3310aabee7074848911f43bf5d69'/>
<id>urn:sha1:ee38767f152a3310aabee7074848911f43bf5d69</id>
<content type='text'>
Integrate crypto_engine into CAAM, to make use of the engine queue.
Add support for SKCIPHER algorithms.

This is intended to be used for CAAM backlogging support.
The requests, with backlog flag (e.g. from dm-crypt) will be listed
into crypto-engine queue and processed by CAAM when free.
This changes the return codes for enqueuing a request:
-EINPROGRESS if OK, -EBUSY if request is backlogged (via
crypto-engine), -ENOSPC if the queue is full, -EIO if it
cannot map the caller's descriptor.

The requests, with backlog flag, will be listed into crypto-engine
queue and processed by CAAM when free. Only the backlog request are
sent to crypto-engine since the others can be handled by CAAM, if free,
especially since JR has up to 1024 entries (more than the 10 entries
from crypto-engine).

Signed-off-by: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Signed-off-by: Franck LENORMAND &lt;franck.lenormand@nxp.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - use devres to de-initialize QI</title>
<updated>2019-11-01T05:38:30Z</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-10-22T15:30:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f414de2e2fffd89c8a4e5b5e06b0eba5f9d8b1eb'/>
<id>urn:sha1:f414de2e2fffd89c8a4e5b5e06b0eba5f9d8b1eb</id>
<content type='text'>
Use devres to de-initialize the QI and drop explicit de-initialization
code in caam_remove().

Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Chris Healy &lt;cphealy@gmail.com&gt;
Cc: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Cc: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - use devres to remove debugfs</title>
<updated>2019-11-01T05:38:30Z</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-10-22T15:30:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=eceb5daf9ebaa564a65eb2d9d5a4682a33747300'/>
<id>urn:sha1:eceb5daf9ebaa564a65eb2d9d5a4682a33747300</id>
<content type='text'>
Use devres to remove debugfs and drop corresponding
debugfs_remove_recursive() call.

Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Chris Healy &lt;cphealy@gmail.com&gt;
Cc: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Cc: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: Iuliana Prodan &lt;iuliana.prodan@nxp.com&gt;
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - select DMA address size at runtime</title>
<updated>2019-08-30T08:05:30Z</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-08-20T20:23:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a1cf573ee95d5a15bdd1d33310d179d92b229dd1'/>
<id>urn:sha1:a1cf573ee95d5a15bdd1d33310d179d92b229dd1</id>
<content type='text'>
i.MX8 mScale SoC still use 32-bit addresses in its CAAM implmentation,
so we can't rely on sizeof(dma_addr_t) to detemine CAAM pointer
size. Convert the code to query CTPR and MCFGR for that during driver
probing.

Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Cc: Chris Spencer &lt;christopher.spencer@sea.co.uk&gt;
Cc: Cory Tusar &lt;cory.tusar@zii.aero&gt;
Cc: Chris Healy &lt;cphealy@gmail.com&gt;
Cc: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Cc: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Cc: Aymen Sghaier &lt;aymen.sghaier@nxp.com&gt;
Cc: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
