<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/crypto/cavium/zip/zip_device.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/crypto/cavium/zip/zip_device.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/crypto/cavium/zip/zip_device.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2018-04-20T16:58:36Z</updated>
<entry>
<title>crypto: cavium - Fix smp_processor_id() warnings</title>
<updated>2018-04-20T16:58:36Z</updated>
<author>
<name>Jan Glauber</name>
<email>jglauber@cavium.com</email>
</author>
<published>2018-04-09T15:45:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e7a9b05ca4c707ff4b46a77963db48d085d383e0'/>
<id>urn:sha1:e7a9b05ca4c707ff4b46a77963db48d085d383e0</id>
<content type='text'>
Switch to raw_smp_processor_id() to prevent a number of
warnings from kernel debugging. We do not care about
preemption here, as the CPU number is only used as a
poor mans load balancing or device selection. If preemption
happens during a compress/decompress operation a small performance
hit will occur but everything will continue to work, so just
ignore it.

Signed-off-by: Jan Glauber &lt;jglauber@cavium.com&gt;
Reviewed-by: Robert Richter &lt;rrichter@cavium.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zip - Wire-up Compression / decompression HW offload</title>
<updated>2017-03-09T10:34:26Z</updated>
<author>
<name>Mahipal Challa</name>
<email>mahipalreddy2006@gmail.com</email>
</author>
<published>2017-02-15T05:15:09Z</published>
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<id>urn:sha1:f05845fcba12579ad84f58386b60adbfc14397b2</id>
<content type='text'>
This contains changes for adding compression/decompression h/w offload
functionality for both DEFLATE and LZS.

Signed-off-by: Mahipal Challa &lt;Mahipal.Challa@cavium.com&gt;
Signed-off-by: Jan Glauber &lt;jglauber@cavium.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: zip - Add ThunderX ZIP driver core</title>
<updated>2017-03-09T10:34:25Z</updated>
<author>
<name>Mahipal Challa</name>
<email>mahipalreddy2006@gmail.com</email>
</author>
<published>2017-02-15T05:15:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=640035a2dc5534b49cd64580e41874b71f131a1c'/>
<id>urn:sha1:640035a2dc5534b49cd64580e41874b71f131a1c</id>
<content type='text'>
Add a driver for the ZIP engine found on Cavium ThunderX SOCs.
The ZIP engine supports hardware accelerated compression and
decompression. It includes 2 independent ZIP cores and supports:

- DEFLATE compression and decompression (RFC 1951)
- LZS compression and decompression (RFC 2395 and ANSI X3.241-1994)
- ADLER32 and CRC32 checksums for ZLIB (RFC 1950) and GZIP (RFC 1952)

The ZIP engine is presented as a PCI device. It supports DMA and
scatter-gather.

Signed-off-by: Mahipal Challa &lt;Mahipal.Challa@cavium.com&gt;
Signed-off-by: Jan Glauber &lt;jglauber@cavium.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
