<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/crypto/ccp/sp-dev.h, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/crypto/ccp/sp-dev.h?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/crypto/ccp/sp-dev.h?h=linus%2Fmaster'/>
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<updated>2021-04-22T07:31:31Z</updated>
<entry>
<title>crypto: ccp - Make ccp_dev_suspend and ccp_dev_resume void functions</title>
<updated>2021-04-22T07:31:31Z</updated>
<author>
<name>Tian Tao</name>
<email>tiantao6@hisilicon.com</email>
</author>
<published>2021-04-16T01:06:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5d17c414e1029d245d535d10c6ead04dc2f65e15'/>
<id>urn:sha1:5d17c414e1029d245d535d10c6ead04dc2f65e15</id>
<content type='text'>
Since ccp_dev_suspend() and ccp_dev_resume() only return 0 which causes
ret to equal 0 in sp_suspend and sp_resume, making the if condition
impossible to use. it might be a more appropriate fix to have these be
void functions and eliminate the if condition in sp_suspend() and
sp_resume().

Signed-off-by: Tian Tao &lt;tiantao6@hisilicon.com&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Acked-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Acked-by: John Allen &lt;john.allen@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - use generic power management</title>
<updated>2020-07-31T08:25:26Z</updated>
<author>
<name>Vaibhav Gupta</name>
<email>vaibhavgupta40@gmail.com</email>
</author>
<published>2020-07-22T09:30:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f892a21f51162d2c443c972d450f73ffa7fb49bb'/>
<id>urn:sha1:f892a21f51162d2c443c972d450f73ffa7fb49bb</id>
<content type='text'>
Drivers using legacy power management .suspen()/.resume() callbacks
have to manage PCI states and device's PM states themselves. They also
need to take care of standard configuration registers.

Switch to generic power management framework using a single
"struct dev_pm_ops" variable to take the unnecessary load from the driver.
This also avoids the need for the driver to directly call most of the PCI
helper functions and device power state control functions as through
the generic framework, PCI Core takes care of the necessary operations,
and drivers are required to do only device-specific jobs.

Signed-off-by: Vaibhav Gupta &lt;vaibhavgupta40@gmail.com&gt;
Acked-by: John Allen &lt;john.allen@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Cleanup sp_dev_master in psp_dev_destroy()</title>
<updated>2020-03-12T12:00:12Z</updated>
<author>
<name>John Allen</name>
<email>john.allen@amd.com</email>
</author>
<published>2020-03-03T13:57:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=15f7a4c65293d188651e21a9c5ab6bd8f99a1459'/>
<id>urn:sha1:15f7a4c65293d188651e21a9c5ab6bd8f99a1459</id>
<content type='text'>
Introduce clear_psp_master_device() to ensure that sp_dev_master gets
properly cleared on the release of a psp device.

Fixes: 2a6170dfe755 ("crypto: ccp: Add Platform Security Processor (PSP) device support")
Signed-off-by: John Allen &lt;john.allen@amd.com&gt;
Acked-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - add TEE support for Raven Ridge</title>
<updated>2019-12-20T06:58:32Z</updated>
<author>
<name>Rijo Thomas</name>
<email>Rijo-john.Thomas@amd.com</email>
</author>
<published>2019-12-04T06:19:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=33960acccfbd7f24d443cb3d0312ac28abe62bae'/>
<id>urn:sha1:33960acccfbd7f24d443cb3d0312ac28abe62bae</id>
<content type='text'>
Adds a PCI device entry for Raven Ridge. Raven Ridge is an APU with a
dedicated AMD Secure Processor having Trusted Execution Environment (TEE)
support. The TEE provides a secure environment for running Trusted
Applications (TAs) which implement security-sensitive parts of a feature.

This patch configures AMD Secure Processor's TEE interface by initializing
a ring buffer (shared memory between Rich OS and Trusted OS) which can hold
multiple command buffer entries. The TEE interface is facilitated by a set
of CPU to PSP mailbox registers.

The next patch will address how commands are submitted to the ring buffer.

Cc: Jens Wiklander &lt;jens.wiklander@linaro.org&gt;
Cc: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Co-developed-by: Devaraj Rangasamy &lt;Devaraj.Rangasamy@amd.com&gt;
Signed-off-by: Devaraj Rangasamy &lt;Devaraj.Rangasamy@amd.com&gt;
Signed-off-by: Rijo Thomas &lt;Rijo-john.Thomas@amd.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - move SEV vdata to a dedicated data structure</title>
<updated>2019-12-20T06:58:32Z</updated>
<author>
<name>Rijo Thomas</name>
<email>Rijo-john.Thomas@amd.com</email>
</author>
<published>2019-12-04T06:19:00Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6eb0cc72bcbe9cc5b9ccd41d7226929767e41311'/>
<id>urn:sha1:6eb0cc72bcbe9cc5b9ccd41d7226929767e41311</id>
<content type='text'>
PSP can support both SEV and TEE interface. Therefore, move
SEV specific registers to a dedicated data structure.
TEE interface specific registers will be added in a later
patch.

Cc: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Cc: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: Jens Wiklander &lt;jens.wiklander@linaro.org&gt;
Co-developed-by: Devaraj Rangasamy &lt;Devaraj.Rangasamy@amd.com&gt;
Signed-off-by: Devaraj Rangasamy &lt;Devaraj.Rangasamy@amd.com&gt;
Signed-off-by: Rijo Thomas &lt;Rijo-john.Thomas@amd.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Remove unnecessary linux/pci.h include</title>
<updated>2019-08-09T05:12:30Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-08-02T23:20:12Z</published>
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<id>urn:sha1:3a646b6ed49cc64f0dc0a1bba24e62f7b557e7d7</id>
<content type='text'>
Remove unused includes of linux/pci.h.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Update copyright notices and dates</title>
<updated>2019-01-11T06:16:56Z</updated>
<author>
<name>Hook, Gary</name>
<email>Gary.Hook@amd.com</email>
</author>
<published>2018-12-18T15:48:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fa5cd1c72e32bd4f9c52626d9a9a2b0ca635b3bc'/>
<id>urn:sha1:fa5cd1c72e32bd4f9c52626d9a9a2b0ca635b3bc</id>
<content type='text'>
Correct copyright dates for files that have had code added
to them in 2018.

Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Support register differences between PSP devices</title>
<updated>2018-07-13T10:26:48Z</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2018-07-03T17:12:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ad01a984f512c42c9f4fe79d36b9cddbc6156a3f'/>
<id>urn:sha1:ad01a984f512c42c9f4fe79d36b9cddbc6156a3f</id>
<content type='text'>
In preparation for adding a new PSP device ID that uses different register
offsets, add support to the PSP version data for register offset values.
And then update the code to use these new register offset values.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Reviewed-by: Brijesh Singh &lt;brijesh.singh@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support</title>
<updated>2017-12-04T16:57:28Z</updated>
<author>
<name>Brijesh Singh</name>
<email>brijesh.singh@amd.com</email>
</author>
<published>2017-12-04T16:57:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=200664d5237f3f8cd2a2f9f5c5dea08502336bd1'/>
<id>urn:sha1:200664d5237f3f8cd2a2f9f5c5dea08502336bd1</id>
<content type='text'>
AMD's new Secure Encrypted Virtualization (SEV) feature allows the
memory contents of virtual machines to be transparently encrypted with a
key unique to the VM. The programming and management of the encryption
keys are handled by the AMD Secure Processor (AMD-SP) which exposes the
commands for these tasks. The complete spec is available at:

http://support.amd.com/TechDocs/55766_SEV-KM%20API_Specification.pdf

Extend the AMD-SP driver to provide the following support:

 - an in-kernel API to communicate with the SEV firmware. The API can be
   used by the hypervisor to create encryption context for a SEV guest.

 - a userspace IOCTL to manage the platform certificates.

Cc: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Cc: "Radim Krčmář" &lt;rkrcmar@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Cc: Gary Hook &lt;gary.hook@amd.com&gt;
Cc: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: linux-crypto@vger.kernel.org
Cc: kvm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Improvements-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Brijesh Singh &lt;brijesh.singh@amd.com&gt;
</content>
</entry>
</feed>
