<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/crypto/hisilicon/zip, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/crypto/hisilicon/zip?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/crypto/hisilicon/zip?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-16T10:29:46Z</updated>
<entry>
<title>crypto: hisilicon - support get algs by the capability register</title>
<updated>2022-09-16T10:29:46Z</updated>
<author>
<name>Zhiqi Song</name>
<email>songzhiqi1@huawei.com</email>
</author>
<published>2022-09-09T09:47:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d310dc2554a5296a338f974d2b4e4f9af2687558'/>
<id>urn:sha1:d310dc2554a5296a338f974d2b4e4f9af2687558</id>
<content type='text'>
The value of qm algorithm can change dynamically according to the
value of the capability register.

Add xxx_set_qm_algs() function to obtain the algs that the
hardware device supported from the capability register and set
them into usr mode attribute files.

Signed-off-by: Zhiqi Song &lt;songzhiqi1@huawei.com&gt;
Signed-off-by: Wenkai Lin &lt;linwenkai6@hisilicon.com&gt;
Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - support zip capability</title>
<updated>2022-09-16T10:29:45Z</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-09-09T09:47:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=db700974b69d2c12a8fe84c45820892416a1e265'/>
<id>urn:sha1:db700974b69d2c12a8fe84c45820892416a1e265</id>
<content type='text'>
Add function 'hisi_zip_alg_support' to get device configuration
information from capability registers, instead of determining whether
to register an algorithm based on hardware platform's version.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - get error type from hardware registers</title>
<updated>2022-09-16T10:29:45Z</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-09-09T09:46:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d90fab0deb8e580aa001f6876e4436c21e944f27'/>
<id>urn:sha1:d90fab0deb8e580aa001f6876e4436c21e944f27</id>
<content type='text'>
Hardware V3 and later versions support get error type from
registers. To be compatible with later hardware versions,
get error type from registers instead of fixed marco.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - get qp num and depth from hardware registers</title>
<updated>2022-09-16T10:29:44Z</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-09-09T09:46:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=129a9f340172b4f3857260a7a7bb9d7b3496ba50'/>
<id>urn:sha1:129a9f340172b4f3857260a7a7bb9d7b3496ba50</id>
<content type='text'>
Hardware V3 and later versions can obtain qp num and depth supported
by the hardware from registers. To be compatible with later hardware
versions, get qp num and depth from registers instead of fixed marcos.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - get hardware features from hardware registers</title>
<updated>2022-09-16T10:29:44Z</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-09-09T09:46:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=82f00b24f532557fb0e15a6a2747859e4b70c4bd'/>
<id>urn:sha1:82f00b24f532557fb0e15a6a2747859e4b70c4bd</id>
<content type='text'>
Before hardware V3, hardwares do not provide the feature registers,
driver resolves hardware differences based on the hardware version.
As a result, the driver does not support the new hardware.

Hardware V3 and later versions support to obtain hardware features,
such as power-gating management and doorbell isolation, through
the hardware registers. To be compatible with later hardware versions,
the features of the current device is obtained by reading the
hardware registers instead of the hardware version.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - some misc cleanup</title>
<updated>2022-08-19T10:39:38Z</updated>
<author>
<name>Yang Shen</name>
<email>shenyang39@huawei.com</email>
</author>
<published>2022-08-13T10:19:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6d9a899557c8751372da99d137eaaa9cdbe81f41'/>
<id>urn:sha1:6d9a899557c8751372da99d137eaaa9cdbe81f41</id>
<content type='text'>
Some cleanup for code:
1. Change names for easy to understand.
2. Unify the variables type.
3. Use the right return value.

Signed-off-by: Yang Shen &lt;shenyang39@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - optimization for performance</title>
<updated>2022-08-19T10:39:37Z</updated>
<author>
<name>Yang Shen</name>
<email>shenyang39@huawei.com</email>
</author>
<published>2022-08-13T09:57:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4f336045276b26c1620d0cb64d4af39ec508f436'/>
<id>urn:sha1:4f336045276b26c1620d0cb64d4af39ec508f436</id>
<content type='text'>
1.Remove some useless steps during doing requests.
2.Adjust the possibility of branch prediction.

Signed-off-by: Yang Shen &lt;shenyang39@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - fix mismatch in get/set sgl_sge_nr</title>
<updated>2022-08-19T10:39:34Z</updated>
<author>
<name>Ye Weihua</name>
<email>yeweihua4@huawei.com</email>
</author>
<published>2022-07-28T02:07:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d74f9340097a881869c4c22ca376654cc2516ecc'/>
<id>urn:sha1:d74f9340097a881869c4c22ca376654cc2516ecc</id>
<content type='text'>
KASAN reported this Bug:

	[17619.659757] BUG: KASAN: global-out-of-bounds in param_get_int+0x34/0x60
	[17619.673193] Read of size 4 at addr fffff01332d7ed00 by task read_all/1507958
	...
	[17619.698934] The buggy address belongs to the variable:
	[17619.708371]  sgl_sge_nr+0x0/0xffffffffffffa300 [hisi_zip]

There is a mismatch in hisi_zip when get/set the variable sgl_sge_nr.
The type of sgl_sge_nr is u16, and get/set sgl_sge_nr by
param_get/set_int.

Replacing param_get/set_int to param_get/set_ushort can fix this bug.

Fixes: f081fda293ffb ("crypto: hisilicon - add sgl_sge_nr module param for zip")
Signed-off-by: Ye Weihua &lt;yeweihua4@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - Use the bitmap API to allocate bitmaps</title>
<updated>2022-07-29T10:29:17Z</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2022-07-21T20:58:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=11364d61314eb97b12d6b6facb1ededada52fcc1'/>
<id>urn:sha1:11364d61314eb97b12d6b6facb1ededada52fcc1</id>
<content type='text'>
Use bitmap_zalloc()/bitmap_free() instead of hand-writing them.
It is less verbose and it improves the semantic.

While at it, add an explicit include &lt;linux/bitmap.h&gt;.

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - move alloc qm-&gt;wq to qm.c</title>
<updated>2022-06-17T09:19:20Z</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-06-09T12:31:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3099fc9c2b3aaace80947d07d13b40da2dd79fd4'/>
<id>urn:sha1:3099fc9c2b3aaace80947d07d13b40da2dd79fd4</id>
<content type='text'>
Before stopping the function, the driver needs to flush all the remaining
work about event irq. Therefore, accelerator drivers use a private
workqueue(qm-&gt;wq) to handle event irq instead of the system workqueue.
This patch moves alloc workqueue from sec_main.c and zip_main.c to qm.c.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
