<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/crypto/stm32/Makefile, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/crypto/stm32/Makefile?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/crypto/stm32/Makefile?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2019-07-09T03:57:08Z</updated>
<entry>
<title>Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2019-07-09T03:57:08Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-07-09T03:57:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4d2fa8b44b891f0da5ceda3e5a1402ccf0ab6f26'/>
<id>urn:sha1:4d2fa8b44b891f0da5ceda3e5a1402ccf0ab6f26</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 5.3:

  API:
   - Test shash interface directly in testmgr
   - cra_driver_name is now mandatory

  Algorithms:
   - Replace arc4 crypto_cipher with library helper
   - Implement 5 way interleave for ECB, CBC and CTR on arm64
   - Add xxhash
   - Add continuous self-test on noise source to drbg
   - Update jitter RNG

  Drivers:
   - Add support for SHA204A random number generator
   - Add support for 7211 in iproc-rng200
   - Fix fuzz test failures in inside-secure
   - Fix fuzz test failures in talitos
   - Fix fuzz test failures in qat"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (143 commits)
  crypto: stm32/hash - remove interruptible condition for dma
  crypto: stm32/hash - Fix hmac issue more than 256 bytes
  crypto: stm32/crc32 - rename driver file
  crypto: amcc - remove memset after dma_alloc_coherent
  crypto: ccp - Switch to SPDX license identifiers
  crypto: ccp - Validate the the error value used to index error messages
  crypto: doc - Fix formatting of new crypto engine content
  crypto: doc - Add parameter documentation
  crypto: arm64/aes-ce - implement 5 way interleave for ECB, CBC and CTR
  crypto: arm64/aes-ce - add 5 way interleave routines
  crypto: talitos - drop icv_ool
  crypto: talitos - fix hash on SEC1.
  crypto: talitos - move struct talitos_edesc into talitos.h
  lib/scatterlist: Fix mapping iterator when sg-&gt;offset is greater than PAGE_SIZE
  crypto/NX: Set receive window credits to max number of CRBs in RxFIFO
  crypto: asymmetric_keys - select CRYPTO_HASH where needed
  crypto: serpent - mark __serpent_setkey_sbox noinline
  crypto: testmgr - dynamically allocate crypto_shash
  crypto: testmgr - dynamically allocate testvec_config
  crypto: talitos - eliminate unneeded 'done' functions at build time
  ...
</content>
</entry>
<entry>
<title>crypto: stm32/crc32 - rename driver file</title>
<updated>2019-07-03T14:15:07Z</updated>
<author>
<name>Lionel Debieve</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2019-06-28T11:26:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fdbd643a74efb353a20ecde94a2200e13a283b66'/>
<id>urn:sha1:fdbd643a74efb353a20ecde94a2200e13a283b66</id>
<content type='text'>
Use the same naming convention for all stm32 crypto
drivers.

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>crypto: stm32 - Use standard CONFIG name</title>
<updated>2017-12-28T06:56:50Z</updated>
<author>
<name>Corentin Labbe</name>
<email>clabbe@baylibre.com</email>
</author>
<published>2017-12-20T18:19:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=02d9e320c693cc14512836a54ce3953e399fd3a8'/>
<id>urn:sha1:02d9e320c693cc14512836a54ce3953e399fd3a8</id>
<content type='text'>
All hardware crypto devices have their CONFIG names using the following
convention:
CRYPTO_DEV_name_algo

This patch apply this conventions on STM32 CONFIG names.

Signed-off-by: Corentin Labbe &lt;clabbe@baylibre.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: stm32 - Support for STM32 CRYP crypto module</title>
<updated>2017-11-29T05:43:42Z</updated>
<author>
<name>Fabien DESSENNE</name>
<email>fabien.dessenne@st.com</email>
</author>
<published>2017-10-19T15:10:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9e054ec21ef8344345b28603fb272fe999f735db'/>
<id>urn:sha1:9e054ec21ef8344345b28603fb272fe999f735db</id>
<content type='text'>
This module registers block cipher algorithms that make use of the
STMicroelectronics STM32 crypto "CRYP1" hardware.
The following algorithms are supported:
- aes: ecb, cbc, ctr
- des: ecb, cbc
- tdes: ecb, cbc

Signed-off-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: stm32 - Support for STM32 HASH module</title>
<updated>2017-07-28T09:55:59Z</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:32:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8a1012d3f2abcef43470f879dbfd72651818e059'/>
<id>urn:sha1:8a1012d3f2abcef43470f879dbfd72651818e059</id>
<content type='text'>
This module register a HASH module that support multiples
algorithms: MD5, SHA1, SHA224, SHA256.

It includes the support of HMAC hardware processing corresponding
to the supported algorithms. DMA or IRQ mode are used depending
on data length.

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: stm32 - Rename module to use generic crypto</title>
<updated>2017-07-28T09:55:54Z</updated>
<author>
<name>lionel.debieve@st.com</name>
<email>lionel.debieve@st.com</email>
</author>
<published>2017-07-13T13:06:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c35af01d939a865b666591ddc653d082258a1135'/>
<id>urn:sha1:c35af01d939a865b666591ddc653d082258a1135</id>
<content type='text'>
The complete stm32 module is rename as crypto
in order to use generic naming

Signed-off-by: Lionel Debieve &lt;lionel.debieve@st.com&gt;
Reviewed-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: stm32 - Support for STM32 CRC32 crypto module</title>
<updated>2017-04-05T13:58:33Z</updated>
<author>
<name>Fabien DESSENNE</name>
<email>fabien.dessenne@st.com</email>
</author>
<published>2017-03-21T15:13:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b51dbe90912a0ce0c78717d2a8374af80b18ed11'/>
<id>urn:sha1:b51dbe90912a0ce0c78717d2a8374af80b18ed11</id>
<content type='text'>
This module registers a CRC32 ("Ethernet") and a CRC32C (Castagnoli)
algorithm that make use of the STMicroelectronics STM32 crypto hardware.

Theses algorithms are compatible with the little-endian generic ones.
Both algorithms use ~0 as default seed (key).
With CRC32C the output is xored with ~0.

Using TCRYPT CRC32C speed test, this shows up to 900% speedup compared
to the crc32c-generic algorithm.

Signed-off-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
