linux-dev/drivers/crypto/xilinx/Makefile, branch masterLinux kernel development work - see feature brancheshttps://git.zx2c4.com/linux-dev/atom/drivers/crypto/xilinx/Makefile?h=master2022-03-02T22:49:21Zcrypto: xilinx - Add Xilinx SHA3 driver2022-03-02T22:49:21ZHarshaharsha.harsha@xilinx.com2022-02-23T10:35:03Zurn:sha1:7ecc3e34474b7055994314ab6cff75eac7d03b71
This patch adds SHA3 driver support for the Xilinx ZynqMP SoC.
Xilinx ZynqMP SoC has SHA3 engine used for secure hash calculation.
The flow is
SHA3 request from Userspace -> SHA3 driver-> ZynqMp driver-> Firmware ->
SHA3 HW Engine
SHA3 HW engine in Xilinx ZynqMP SoC, does not support parallel processing
of 2 hash requests.
Therefore, software fallback is being used for init, update, final,
export and import in the ZynqMP SHA driver
For digest, the calculation of SHA3 hash is done by the hardened
SHA3 accelerator in Xilinx ZynqMP SoC.
Signed-off-by: Harsha <harsha.harsha@xilinx.com>
Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: xilinx - Add Xilinx AES driver2020-02-28T00:36:46ZKalyani Akulakalyani.akula@xilinx.com2020-02-17T10:26:43Zurn:sha1:4d96f7d48131fefe30d7c1d1e2a23ef37164dbf5
This patch adds AES driver support for the Xilinx ZynqMP SoC.
Signed-off-by: Mohan Marutirao Dhanawade <mohan.dhanawade@xilinx.com>
Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>