linux-dev/drivers/dma/dw-axi-dmac, branch master

Merge tag 'dmaengine-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

2022-08-05T01:44:38Z

Pull dmaengine updates from Vinod Koul: "New support / Core: - Remove DMA_MEMCPY_SG for lack of users - Tegra 234 dmaengine support - Mediatek MT8365 dma support - Apple ADMAC driver Updates: - Yaml conversion for ST-Ericsson DMA40 binding and Freescale edma - rz-dmac updates and device_synchronize support - Bunch of typo in comments fixes in drivers - multithread support in sf-pdma driver" * tag 'dmaengine-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (50 commits) dmaengine: mediatek: mtk-hsdma: Fix typo 'the the' in comment dmaengine: axi-dmac: check cache coherency register dmaengine: sh: rz-dmac: Add device_synchronize callback dmaengine: sprd: Cleanup in .remove() after pm_runtime_get_sync() failed dmaengine: tegra: Add terminate() for Tegra234 dt-bindings: dmaengine: Add compatible for Tegra234 dmaengine: xilinx: use strscpy to replace strlcpy dmaengine: imx-sdma: Add FIFO stride support for multi FIFO script dmaengine: idxd: Correct IAX operation code names dmaengine: imx-dma: Cast of_device_get_match_data() with (uintptr_t) dmaengine: dw-axi-dmac: ignore interrupt if no descriptor dmaengine: dw-axi-dmac: do not print NULL LLI during error dmaengine: altera-msgdma: Fixed some inconsistent function name descriptions dmaengine: imx-sdma: Add missing struct documentation dmaengine: sf-pdma: Add multithread support for a DMA channel dt-bindings: dma: dw-axi-dmac: extend the number of interrupts dmaengine: dmatest: use strscpy to replace strlcpy dmaengine: ste_dma40: fix typo in comment dmaengine: jz4780: fix typo in comment dmaengine: s3c24xx: fix typo in comment ...

dmaengine: dw-axi-dmac: ignore interrupt if no descriptor

2022-07-21T12:33:09Z

If the channel has no descriptor and the interrupt is raised then the kernel will OOPS. Check the result of vchan_next_desc() in the handler axi_chan_block_xfer_complete() to avoid the error happening. Signed-off-by: Ben Dooks Link: https://lore.kernel.org/r/20220708170153.269991-4-ben.dooks@sifive.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: do not print NULL LLI during error

2022-07-21T12:33:08Z

During debugging we have seen an issue where axi_chan_dump_lli() is passed a NULL LLI pointer which ends up causing an OOPS due to trying to get fields from it. Simply print NULL LLI and exit to avoid this. Signed-off-by: Ben Dooks Link: https://lore.kernel.org/r/20220708170153.269991-3-ben.dooks@sifive.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: Fix RMW on channel suspend register

2022-07-01T11:48:26Z

When the DMA is configured for more than 8 channels the bits controlling suspend moves to another register. However when adding support for this the new register would be completely overwritten in one case and overwritten with values from the old register in another case. Found by comparing the parallel implementation of more than 8 channel support for the StarFive JH7100 SoC by Samin. Fixes: 824351668a41 ("dmaengine: dw-axi-dmac: support DMAX_NUM_CHANNELS > 8") Co-developed-by: Samin Guo Signed-off-by: Samin Guo Signed-off-by: Emil Renner Berthing Link: https://lore.kernel.org/r/20220627090939.1775717-1-emil.renner.berthing@canonical.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: cleanup comments

2022-03-11T10:35:01Z

For spdx, /* */ for *.h, remove extra space Replacements configurarion to configuration inerrupts to interrupts chanels to channels Signed-off-by: Tom Rix Link: https://lore.kernel.org/r/20220309020056.1026106-1-trix@redhat.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: Fix uninitialized variable in axi_chan_block_xfer_start()

2021-11-22T05:52:26Z

Coverity complains of an uninitialized variable: 5. uninit_use_in_call: Using uninitialized value config.dst_per when calling axi_chan_config_write. [show details] 6. uninit_use_in_call: Using uninitialized value config.hs_sel_src when calling axi_chan_config_write. [show details] CID 121164 (#1-3 of 3): Uninitialized scalar variable (UNINIT) 7. uninit_use_in_call: Using uninitialized value config.src_per when calling axi_chan_config_write. [show details] 418 axi_chan_config_write(chan, &config); Fix this by initializing the structure to 0 which should at least be benign in axi_chan_config_write(). Also fix what looks like a cut-n-paste error when initializing config.hs_sel_dst. Fixes: 824351668a413 ("dmaengine: dw-axi-dmac: support DMAX_NUM_CHANNELS > 8") Cc: Eugeniy Paltsev Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Tim Gardner Link: https://lore.kernel.org/r/20211025181656.31658-1-tim.gardner@canonical.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: Simplify assignment in dma_chan_pause()

2021-10-28T17:13:51Z

Simplify assigning zero and performing a logical OR to a single assignment. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/2abd0da35608c14689a919d47dd45898a8ab4297.1635263478.git.geert@linux-m68k.org Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: set coherent mask

2021-10-18T06:44:20Z

Add support for setting dma coherent mask, dma mask is set to 64 bit Signed-off-by: Pandith N Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20211001140812.24977-4-pandith.n@intel.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: Hardware handshake configuration

2021-10-18T06:44:19Z

Added hardware handshake selection in channel config, for mem2per and per2mem case. The peripheral specific handshake interface needs to be programmed in src_per, dst_per bits of CHx_CFG register. Signed-off-by: Pandith N Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20211001140812.24977-3-pandith.n@intel.com Signed-off-by: Vinod Koul

dmaengine: dw-axi-dmac: support DMAX_NUM_CHANNELS > 8

2021-10-18T06:44:19Z

Added support for DMA controller with more than 8 channels. DMAC register map changes based on number of channels. Enabling DMAC channel: DMAC_CHENREG has to be used when number of channels <= 8 DMAC_CHENREG2 has to be used when number of channels > 8 Configuring DMA channel: CHx_CFG has to be used when number of channels <= 8 CHx_CFG2 has to be used when number of channels > 8 Suspending and resuming channel: DMAC_CHENREG has to be used when number of channels <= 8 DMAC_CHSUSPREG has to be used for suspending a channel > 8 Signed-off-by: Pandith N Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20211001140812.24977-2-pandith.n@intel.com Signed-off-by: Vinod Koul