linux-dev/drivers/edac/Makefile, branch master

EDAC/amd64: Merge error injection sysfs facilities

2020-12-28T18:36:25Z

Merge them into the main driver and put them inside an EDAC_DEBUG ifdeffery to simplify the driver and have all debugging/injection stuff behind a debug build-time switch. No functional changes. Signed-off-by: Borislav Petkov Reviewed-by: Yazen Ghannam Link: https://lkml.kernel.org/r/20201215110517.5215-2-bp@alien8.de

EDAC/amd64: Merge sysfs debugging attributes setup code

2020-12-28T18:36:17Z

There's no need for them to be in a separate file so merge them into the main driver compilation unit like the other EDAC drivers do. Drop now-unneeded function export, make the function static and shorten static function names. No functional changes. Signed-off-by: Borislav Petkov Reviewed-by: Yazen Ghannam Link: https://lkml.kernel.org/r/20201215110517.5215-1-bp@alien8.de

Merge branches 'edac-spr', 'edac-igen6' and 'edac-misc' into edac-updates-for-v5.11

2020-12-14T10:51:46Z

Signed-off-by: Borislav Petkov

EDAC/mv64x60: Remove orphan mv64x60 driver

2020-12-07T11:16:02Z

The mv64x60 EDAC driver depends on CONFIG_MV64X60. But that symbol is not user-selectable, and the last code that selected it was removed with the C2K board support in 2018, see: 92c8c16f3457 ("powerpc/embedded6xx: Remove C2K board support") That means the driver is now dead code, so remove it. Suggested-by: Borislav Petkov Signed-off-by: Michael Ellerman Signed-off-by: Borislav Petkov Link: https://lkml.kernel.org/r/20201207040253.628528-1-mpe@ellerman.id.au

EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC

2020-11-19T20:51:17Z

This driver supports Intel client SoC with integrated memory controller using In-Band ECC(IBECC). The memory correctable and uncorrectable errors are reported via NMIs. The driver handles the NMIs and decodes the memory error address to platform specific address. The first IBECC-supported SoC is Elkhart Lake. [Tony: s/#include /#include / to fix randconfig build] Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck

EDAC/al-mc-edac: Add Amazon's Annapurna Labs Memory Controller driver

2020-08-17T08:10:29Z

The Amazon's Annapurna Labs Memory Controller EDAC supports ECC capability for error detection and correction (Single bit error correction, Double detection). This driver introduces EDAC driver for that capability. [ bp: Remove "EDAC" string from Kconfig tristate as it is redundant. ] Signed-off-by: Talel Shenhar Signed-off-by: Borislav Petkov Reviewed-by: James Morse Link: https://lkml.kernel.org/r/20200816185551.19108-3-talel@amazon.com

EDAC: Add EDAC driver for DMC520

2020-02-19T20:00:27Z

The driver supports error detection and correction on devices with an ARM DMC-520 memory controller. Signed-off-by: Lei Wang Signed-off-by: Shiping Ji Signed-off-by: Borislav Petkov Reviewed-by: James Morse Link: https://lkml.kernel.org/r/83b48c70-dc06-d0d4-cae9-a2187fca628b@gmail.com

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

2019-09-22T16:39:09Z

Pull ARM updates from Russell King: - fix various clang build and cppcheck issues - switch ARM to use new common outgoing-CPU-notification code - add some additional explanation about the boot code - kbuild "make clean" fixes - get rid of another "(____ptrval____)", this time for the VDSO code - avoid treating cache maintenance faults as a write - add a frame pointer unwinder implementation for clang - add EDAC support for Aurora L2 cache - improve robustness of adjust_lowmem_bounds() finding the bounds of lowmem. - add reset control for AMBA primecell devices * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (24 commits) ARM: 8906/1: drivers/amba: add reset control to amba bus probe ARM: 8905/1: Emit __gnu_mcount_nc when using Clang 10.0.0 or newer ARM: 8904/1: skip nomap memblocks while finding the lowmem/highmem boundary ARM: 8903/1: ensure that usable memory in bank 0 starts from a PMD-aligned address ARM: 8891/1: EDAC: armada_xp: Add support for more SoCs ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC ARM: 8892/1: EDAC: Add missing debugfs_create_x32 wrapper ARM: 8890/1: l2x0: add marvell,ecc-enable property for aurora ARM: 8889/1: dt-bindings: document marvell,ecc-enable binding ARM: 8886/1: l2x0: support parity-enable/disable on aurora ARM: 8885/1: aurora-l2: add defines for parity and ECC registers ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZE ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware ARM: 8900/1: UNWINDER_FRAME_POINTER implementation for Clang ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes ARM: 8896/1: VDSO: Don't leak kernel addresses ARM: 8895/1: visit mach-* and plat-* directories when cleaning ARM: 8894/1: boot: Replace open-coded nop with macro ARM: 8893/1: boot: Explain the 8 nops ARM: 8876/1: fix O= building with CONFIG_FPE_FASTFPE ...

ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC

2019-08-29T06:58:01Z

Add support for the ECC functionality as found in the DDR RAM and L2 cache controllers on the MV78230/MV78x60 SoCs. This driver has been tested on the MV78460 (on a custom board with a DDR3 ECC DIMM). [cp use SPDX license] Signed-off-by: Jan Luebbe Signed-off-by: Chris Packham Reviewed-by: Borislav Petkov Signed-off-by: Russell King

EDAC, mellanox: Add ECC support for BlueField DDR4

2019-08-08T15:57:01Z

Add ECC support for Mellanox BlueField SoC DDR controller. This requires SMC to the running Arm Trusted Firmware to report what is the current memory configuration. Reviewed-by: James Morse Signed-off-by: Shravan Kumar Ramani Signed-off-by: Mauro Carvalho Chehab