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<title>linux-dev/drivers/edac, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/edac?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/edac?h=master'/>
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<updated>2022-10-13T18:07:13Z</updated>
<entry>
<title>Merge patch series "Use composable cache instead of L2 cache"</title>
<updated>2022-10-13T18:07:13Z</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@rivosinc.com</email>
</author>
<published>2022-10-13T18:06:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1a5a2cbd21e58a824688ae2120a3e47b3cd0f876'/>
<id>urn:sha1:1a5a2cbd21e58a824688ae2120a3e47b3cd0f876</id>
<content type='text'>
Zong Li &lt;zong.li@sifive.com&gt; says:

Since composable cache may be L3 cache if private L2 cache exists, we
should use its original name "composable cache" to prevent confusion.

This patchset contains the modification which is related to ccache, such
as DT binding and EDAC driver.

* b4-shazam-merge:
  riscv: Add cache information in AUX vector
  soc: sifive: ccache: define the macro for the register shifts
  soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
  soc: sifive: ccache: reduce printing on init
  soc: sifive: ccache: determine the cache level from dts
  soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.
  dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache

Link: https://lore.kernel.org/r/20220913061817.22564-1-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.</title>
<updated>2022-10-13T18:06:51Z</updated>
<author>
<name>Greentime Hu</name>
<email>greentime.hu@sifive.com</email>
</author>
<published>2022-09-13T06:18:12Z</published>
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<id>urn:sha1:ca120a79cf5a3323172c82e77efd70ae10d120ef</id>
<content type='text'>
Since composable cache may be L3 cache if there is a L2 cache, we should
use its original name composable cache to prevent confusion.

There are some new lines were generated due to adding the compatible
"sifive,ccache0" into ID table and indent requirement.

The sifive L2 has been renamed to sifive CCACHE, EDAC driver needs to
apply the change as well.

Signed-off-by: Greentime Hu &lt;greentime.hu@sifive.com&gt;
Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Co-developed-by: Zong Li &lt;zong.li@sifive.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20220913061817.22564-3-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>Merge branches 'edac-drivers' and 'edac-misc' into edac-updates-for-v6.1</title>
<updated>2022-10-04T08:00:25Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2022-10-04T08:00:25Z</published>
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<id>urn:sha1:c257795609e9c9f063c92a6c7ea2e798417700c4</id>
<content type='text'>
Combine all queued EDAC changes for submission into v6.1:

* edac-drivers:
  EDAC/ie31200: Add Skylake-S support

* edac-misc:
  EDAC/i7300: Correct the i7300_exit() function name in comment
  x86/sb_edac: Add row column translation for Broadwell
  EDAC/i10nm: Print an extra register set of retry_rd_err_log
  EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBM
  EDAC/skx_common: Add ChipSelect ADXL component
  EDAC/ppc_4xx: Reorder symbols to get rid of a few forward declarations
  EDAC: Remove obsolete declarations in edac_module.h
  EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUs
  EDAC/skx_common: Make output format similar
  EDAC/skx_common: Use driver decoder first
  EDAC/mc: Drop duplicated dimm-&gt;nr_pages debug printout
  EDAC/mc: Replace spaces with tabs in memtype flags definition
  EDAC/wq: Remove unneeded flush_workqueue()

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC/i7300: Correct the i7300_exit() function name in comment</title>
<updated>2022-09-23T21:07:17Z</updated>
<author>
<name>Colin Ian King</name>
<email>colin.i.king@gmail.com</email>
</author>
<published>2022-08-05T12:50:08Z</published>
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<id>urn:sha1:d3923513edd7f4a614a169122b0eb6b9acb2c8a3</id>
<content type='text'>
The incorrect function name is being used in the comment for function
i7300_exit. Correct this.

Signed-off-by: Colin Ian King &lt;colin.i.king@gmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/20220805125008.2346559-1-colin.i.king@gmail.com
</content>
</entry>
<entry>
<title>x86/sb_edac: Add row column translation for Broadwell</title>
<updated>2022-09-23T19:34:23Z</updated>
<author>
<name>Youquan Song</name>
<email>youquan.song@intel.com</email>
</author>
<published>2022-07-22T23:33:38Z</published>
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<id>urn:sha1:d389059685b46861c264cda4f37a33feeab91dfc</id>
<content type='text'>
The sb_edac driver lacks translation for DIMM internal address.

Add memory address translation for row/column/bank/bank_group
on Broadwell.

Signed-off-by: Youquan Song &lt;youquan.song@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC/i10nm: Print an extra register set of retry_rd_err_log</title>
<updated>2022-09-23T19:33:27Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2022-07-22T23:33:37Z</published>
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<id>urn:sha1:d5f5e49953f68bb7b15afd6e32ad176b987c6525</id>
<content type='text'>
Sapphire Rapids server adds an extra register set for logging more
retry_rd_err_log data. So add code to print the extra register set.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBM</title>
<updated>2022-09-23T19:33:18Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2022-07-22T23:33:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=acd4cf68fefe70138926056e3137c9ea99ef7ebf'/>
<id>urn:sha1:acd4cf68fefe70138926056e3137c9ea99ef7ebf</id>
<content type='text'>
An HBM memory channel is divided into two pseudo channels. Each
pseudo channel has its own retry_rd_err_log registers. Retrieve and
print retry_rd_err_log registers of the HBM pseudo channel if the
memory error is from HBM.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC/skx_common: Add ChipSelect ADXL component</title>
<updated>2022-09-23T19:33:08Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2022-07-22T23:33:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=14646de48bd77947cd6a325b42eecddcec5a35c7'/>
<id>urn:sha1:14646de48bd77947cd6a325b42eecddcec5a35c7</id>
<content type='text'>
Each pseudo channel of HBM has its own retry_rd_err_log registers.
The bit 0 of ChipSelect ADXL component encodes the pseudo channel
number of HBM memory. So add ChipSelect ADXL component to get HBM
pseudo channel number.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC/ppc_4xx: Reorder symbols to get rid of a few forward declarations</title>
<updated>2022-09-18T17:35:22Z</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2022-09-17T23:20:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d5e4eeea0c20b7467458cf3f3d887f59075db93e'/>
<id>urn:sha1:d5e4eeea0c20b7467458cf3f3d887f59075db93e</id>
<content type='text'>
When moving the definition of ppc4xx_edac_driver further down, the
forward declarations can just be dropped.

Do this to reduce needless line repetition.

Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/20220917232013.489931-1-u.kleine-koenig@pengutronix.de
</content>
</entry>
<entry>
<title>EDAC: Remove obsolete declarations in edac_module.h</title>
<updated>2022-09-11T10:26:41Z</updated>
<author>
<name>Gaosheng Cui</name>
<email>cuigaosheng1@huawei.com</email>
</author>
<published>2022-09-11T09:40:38Z</published>
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<id>urn:sha1:d42d6f5a5fcd734669e75867c632e724f1dc3552</id>
<content type='text'>
Commit

  4de78c6877ec ("drivers/edac: mod PCI poll names"),

renamed the respective variables and accessors but left the old accessor
declarations edac_get_log_ce(), edac_get_log_ue(), edac_get_poll_msec()
and edac_get_panic_on_ue() in place. Remove them.

  [ bp: Masssage commit message. ]

Signed-off-by: Gaosheng Cui &lt;cuigaosheng1@huawei.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/20220911094038.3224365-1-cuigaosheng1@huawei.com
</content>
</entry>
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