<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/Makefile, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/Makefile?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/Makefile?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-10T21:53:12Z</updated>
<entry>
<title>drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dc</title>
<updated>2022-05-10T21:53:12Z</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2022-04-25T19:07:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=59b8ca2425486ab366bf64a575f161baae0dc760'/>
<id>urn:sha1:59b8ca2425486ab366bf64a575f161baae0dc760</id>
<content type='text'>
[Why &amp; How]
CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC
code should be OS-agnostic.

This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN
in dc and dc/core directories.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN315 blocks to Makefile</title>
<updated>2022-02-18T19:07:01Z</updated>
<author>
<name>Qingqing Zhuo</name>
<email>qingqing.zhuo@amd.com</email>
</author>
<published>2022-02-10T20:12:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0b208d60adffb6b3dde41841ee423fb5be0d01e4'/>
<id>urn:sha1:0b208d60adffb6b3dde41841ee423fb5be0d01e4</id>
<content type='text'>
Signed-off-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Acked-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN316 resource and SMU clock manager</title>
<updated>2022-02-17T20:58:45Z</updated>
<author>
<name>Hansen Dsouza</name>
<email>Hansen.Dsouza@amd.com</email>
</author>
<published>2022-01-26T20:44:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c477eaa6a79da6af7e59f74e69af7d6b3af52a23'/>
<id>urn:sha1:c477eaa6a79da6af7e59f74e69af7d6b3af52a23</id>
<content type='text'>
Add core DC implementation for DCN316.

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: move link_hwss to link folder and break down to files</title>
<updated>2022-02-02T23:26:32Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2022-01-28T14:04:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fd24926676801dd68afa1f39647a858cf4f6ae50'/>
<id>urn:sha1:fd24926676801dd68afa1f39647a858cf4f6ae50</id>
<content type='text'>
[why]
Move link_hwss to its own folder as part of DC LIB and break it down
to separate file one for each type of backend for code isolation.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: move calcs folder into DML</title>
<updated>2022-01-18T22:43:36Z</updated>
<author>
<name>Isabella Basso</name>
<email>isabbasso@riseup.net</email>
</author>
<published>2022-01-07T21:33:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=552b7cb0eed12c184b3bdfcc262e96a954a2bc86'/>
<id>urn:sha1:552b7cb0eed12c184b3bdfcc262e96a954a2bc86</id>
<content type='text'>
The calcs folder has FPU code on it, which should be isolated inside the
DML folder as per https://patchwork.freedesktop.org/series/93042/.

This commit aims single-handedly to correct the location of such FPU
code and does not refactor any functions.

Changes since v2:
- Corrected problems to compile when DCN was disabled.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Isabella Basso &lt;isabbasso@riseup.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add stub to get DPIA tunneling device data</title>
<updated>2021-10-06T19:51:22Z</updated>
<author>
<name>Jimmy Kizito</name>
<email>Jimmy.Kizito@amd.com</email>
</author>
<published>2021-04-01T16:59:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=99447622ae157393296580f9e39224951a1cdcf6'/>
<id>urn:sha1:99447622ae157393296580f9e39224951a1cdcf6</id>
<content type='text'>
[why &amp; how]
1. Add stub for getting tunneling device data
2. Add check for phy_repeater_cnt &lt; 0xff to LTTPR check
3. Add two more bits of information to DPIA links

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Wayne Lin &lt;Wayne.Lin@amd.com&gt;
Acked-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Jimmy Kizito &lt;Jimmy.Kizito@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: fold DRM_AMD_DC_DCN201 into DRM_AMD_DC_DCN</title>
<updated>2021-10-04T19:23:02Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-10-01T14:29:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=519607a2f7798decb9c891a4f706aaf780f5a677'/>
<id>urn:sha1:519607a2f7798decb9c891a4f706aaf780f5a677</id>
<content type='text'>
No need for a separate kconfig option at this point.

Reviewed-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add cyan_skillfish display support</title>
<updated>2021-10-04T19:22:57Z</updated>
<author>
<name>Zhan Liu</name>
<email>zhan.liu@amd.com</email>
</author>
<published>2021-09-25T07:01:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3f68c01be9a2227de1e190317fe34a6fb835a094'/>
<id>urn:sha1:3f68c01be9a2227de1e190317fe34a6fb835a094</id>
<content type='text'>
[Why]
add display related cyan_skillfish files in.

makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag.

v2: squash in clang fixes from Harry, Nathan
v3: squash in missing CONFIG_DRM_AMD_DC check (Alex)

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Signed-off-by: Zhan Liu &lt;zhan.liu@amd.com&gt;
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN</title>
<updated>2021-06-22T20:51:45Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-06-21T20:51:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8fe44c080a53ac0ccbe88053a2e40f9acca33091'/>
<id>urn:sha1:8fe44c080a53ac0ccbe88053a2e40f9acca33091</id>
<content type='text'>
No need for a separate flag now that DCN3.1 is not in bring up.
Fold into DRM_AMD_DC_DCN like previous DCN IPs.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enforce DPCD Address ranges</title>
<updated>2021-06-15T21:25:41Z</updated>
<author>
<name>Wesley Chalmers</name>
<email>Wesley.Chalmers@amd.com</email>
</author>
<published>2021-04-01T16:23:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=30adeee52d1ebadd8e4e594a54c7cf77250b91db'/>
<id>urn:sha1:30adeee52d1ebadd8e4e594a54c7cf77250b91db</id>
<content type='text'>
[WHY]
Some DPCD addresses, notably LTTPR Capability registers, are expected to
be read all together in a single DPCD transaction. Rather than force callers to
read registers they don't need, we want to quietly extend the addresses
read, and only return back the values the caller asked for.
This does not affect DPCD writes.

[HOW]
Create an additional layer above AUX to perform 'checked' DPCD
transactions.
Iterate through an array of DPCD address ranges that are marked as being
contiguous. If a requested read falls within one of those ranges, extend
the read to include the entire range.
After DPCD has been queried, copy the requested bytes into the caller's
data buffer, and deallocate all resources used.

Signed-off-by: Wesley Chalmers &lt;Wesley.Chalmers@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Anson Jacob &lt;Anson.Jacob@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
