<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-26T18:56:30Z</updated>
<entry>
<title>drm/amd/display: Check if modulo is 0 before dividing.</title>
<updated>2022-05-26T18:56:30Z</updated>
<author>
<name>David Galiffi</name>
<email>David.Galiffi@amd.com</email>
</author>
<published>2022-05-03T22:30:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=49947b906a6bd9668eaf4f9cf691973c25c26955'/>
<id>urn:sha1:49947b906a6bd9668eaf4f9cf691973c25c26955</id>
<content type='text'>
[How &amp; Why]
If a value of 0 is read, then this will cause a divide-by-0 panic.

Reviewed-by: Martin Leung &lt;Martin.Leung@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: David Galiffi &lt;David.Galiffi@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dce</title>
<updated>2022-05-10T21:53:12Z</updated>
<author>
<name>Alex Hung</name>
<email>alex.hung@amd.com</email>
</author>
<published>2022-04-25T19:22:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a58cda030231c5e6f70ef376975fbdf3dc0cfda3'/>
<id>urn:sha1:a58cda030231c5e6f70ef376975fbdf3dc0cfda3</id>
<content type='text'>
[Why &amp; How]
CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC
code should be OS-agnostic.

This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN
in dce directory.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Select correct DTO source</title>
<updated>2022-04-12T18:20:13Z</updated>
<author>
<name>Dillon Varone</name>
<email>dillon.varone@amd.com</email>
</author>
<published>2022-04-01T20:45:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e9b1bfa548be678fcfd706291637b51f35ee92b8'/>
<id>urn:sha1:e9b1bfa548be678fcfd706291637b51f35ee92b8</id>
<content type='text'>
[WHY&amp;HOW]
Change criteria for setting DTO source value, and always set it regardless of
the signal type.

Reviewed-by: Ariel Bernstein &lt;Eric.Bernstein@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix pointer dereferenced before checking</title>
<updated>2022-04-01T03:05:54Z</updated>
<author>
<name>Haowen Bai</name>
<email>baihaowen@meizu.com</email>
</author>
<published>2022-03-24T09:46:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e84c8ab52dc76b09cb1c8885950ad4eaaf340bf6'/>
<id>urn:sha1:e84c8ab52dc76b09cb1c8885950ad4eaaf340bf6</id>
<content type='text'>
The value actual_pix_clk_100Hz is dereferencing pointer pix_clk_params
before pix_clk_params is being null checked. Fix this by assigning
pix_clk_params-&gt;requested_pix_clk_100hz to actual_pix_clk_100Hz only if
pix_clk_params is not NULL, otherwise just NULL.

Signed-off-by: Haowen Bai &lt;baihaowen@meizu.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: merge two duplicated clock_source_create</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2022-02-24T17:57:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=305f098020920f9ea6ff9162ee46392f4d67e67f'/>
<id>urn:sha1:305f098020920f9ea6ff9162ee46392f4d67e67f</id>
<content type='text'>
[why]
dcn31x could use dcn31 sepcific which contains deep_color_ratio for dmub

Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Reviewed-by: Hansen Dsouza &lt;hansen.dsouza@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix deep color ratio</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Hansen Dsouza</name>
<email>Hansen.Dsouza@amd.com</email>
</author>
<published>2022-02-19T00:53:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=df5a07c45c68fd85cd4d1a4ad7892d3a717a4ccf'/>
<id>urn:sha1:df5a07c45c68fd85cd4d1a4ad7892d3a717a4ccf</id>
<content type='text'>
Fix enum mapping for deep color ratio

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix 64 bit divisions on 32 bit platforms by using div64 API</title>
<updated>2021-03-02T19:07:59Z</updated>
<author>
<name>Vladimir Stempen</name>
<email>vladimir.stempen@amd.com</email>
</author>
<published>2021-02-24T19:02:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=783bf4035cb7f2707ad760fbc06f6be01a553f0a'/>
<id>urn:sha1:783bf4035cb7f2707ad760fbc06f6be01a553f0a</id>
<content type='text'>
[why]
Synchronization displays with different timings feature uses division
operator for 64 bit division, which is not supported by 32 bit platforms

[how]
Use div64 API for 64 bit division

Signed-off-by: Vladimir Stempen &lt;vladimir.stempen@amd.com&gt;
Tested-by: Bindu Ramamurthy&lt;bindu.r@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Synchronize displays with different timings</title>
<updated>2021-02-22T23:05:48Z</updated>
<author>
<name>Vladimir Stempen</name>
<email>vladimir.stempen@amd.com</email>
</author>
<published>2020-12-29T20:01:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=77a2b7265f20ee827e527eaa6f82b87e88388947'/>
<id>urn:sha1:77a2b7265f20ee827e527eaa6f82b87e88388947</id>
<content type='text'>
[why]
 Vendor based fan noise improvement

[how]
Report timing synchronizable when DP streams time frame
difference is less than 0.05 percent. Adjust DP  DTOs and
sync displays using  MASTER_UPDATE_LOCK_DB_X_Y

Signed-off-by: Vladimir Stempen &lt;vladimir.stempen@amd.com&gt;
Acked-by: Bindu Ramamurthy &lt;bindu.r@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix potential integer overflow</title>
<updated>2021-02-18T21:43:09Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavoars@kernel.org</email>
</author>
<published>2021-02-10T21:23:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f2d51b20d747e027e81ab3c3f24a6c833ada3fb3'/>
<id>urn:sha1:f2d51b20d747e027e81ab3c3f24a6c833ada3fb3</id>
<content type='text'>
Fix potential integer overflow by casting actual_calculated_clock_100hz
to u64, in order to give the compiler complete information about the
proper arithmetic to use.

Notice that such variable is used in a context that expects
an expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arithmetic:

actual_calculated_clock_100hz * post_divider

Fixes: 7a03fdf628af ("drm/amd/display: fix 64bit division issue on 32bit OS")
Addresses-Coverity-ID: 1501691 ("Unintentional integer overflow")
Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix 64bit division issue on 32bit OS</title>
<updated>2021-02-09T20:48:01Z</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2021-01-27T02:32:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7a03fdf628af0c66ab2714278f786b7b97a2a1ac'/>
<id>urn:sha1:7a03fdf628af0c66ab2714278f786b7b97a2a1ac</id>
<content type='text'>
Replace "/" with div_u64 for 64bit division on 32bit OS.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Anson Jacob &lt;Anson.Jacob@amd.com&gt;
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
