<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dce100, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dce100?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dce100?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-07-25T21:17:28Z</updated>
<entry>
<title>drm/amd/display: Add dc_ctx to link_enc_create() parameters</title>
<updated>2022-07-25T21:17:28Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-04-01T19:29:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e216431b63aef8b7d9cf6e59aea39582d48b1808'/>
<id>urn:sha1:e216431b63aef8b7d9cf6e59aea39582d48b1808</id>
<content type='text'>
[Why&amp;How]
Preparation to enable run time initialization of register offsets to add
dc_context to the link_enc_create callback. This is needed to get the
dc_ctx handle where register offset initialization routine is called.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move all linux includes into OS types</title>
<updated>2022-07-05T20:16:49Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2019-11-22T15:12:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09de5cd2c170b19e04e37439a712da52a0535015'/>
<id>urn:sha1:09de5cd2c170b19e04e37439a712da52a0535015</id>
<content type='text'>
Move all linux includes into OS types.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display/dc/dce100/dce100_resource: Include our own header containing prototypes</title>
<updated>2021-01-14T18:20:20Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2021-01-13T08:07:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d350750f4bfb1d075dc0dd15738abff8e45cc684'/>
<id>urn:sha1:d350750f4bfb1d075dc0dd15738abff8e45cc684</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:54:
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:537:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:537:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:542:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:542:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:547:2: note: in expansion of macro ‘DCE10_AUX_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:547:2: note: in expansion of macro ‘DCE10_AUX_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:551:2: note: in expansion of macro ‘DCE10_AUX_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:551:2: note: in expansion of macro ‘DCE10_AUX_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:889:16: warning: no previous prototype for ‘dce100_add_stream_to_ctx’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:916:16: warning: no previous prototype for ‘dce100_validate_plane’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:925:24: warning: no previous prototype for ‘dce100_find_first_free_match_stream_enc_for_link’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:1156:23: warning: no previous prototype for ‘dce100_create_resource_pool’ [-Wmissing-prototypes]

Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Leo Li &lt;sunpeng.li@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display/dc/dce100/Makefile: Ignore -Woverride-init warning</title>
<updated>2021-01-14T18:20:20Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2021-01-13T08:07:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d96e2dc24a1f69f54176d17060a297f9fc54b4e7'/>
<id>urn:sha1:d96e2dc24a1f69f54176d17060a297f9fc54b4e7</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:54:
 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_10_0_sh_mask.h:5084:45: warning: initialized field overwritten [-Woverride-init]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:155:28: note: in expansion of macro ‘GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:170:2: note: in expansion of macro ‘SFB’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:291:2: note: in expansion of macro ‘MI_GFX8_TILE_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:537:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_10_0_sh_mask.h:5084:45: note: (near initialization for ‘mi_shifts.GRPH_NUM_BANKS’)
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:155:28: note: in expansion of macro ‘GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:170:2: note: in expansion of macro ‘SFB’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:291:2: note: in expansion of macro ‘MI_GFX8_TILE_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:537:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_10_0_sh_mask.h:5083:43: warning: initialized field overwritten [-Woverride-init]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:155:28: note: in expansion of macro ‘GRPH_CONTROL__GRPH_NUM_BANKS_MASK’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:170:2: note: in expansion of macro ‘SFB’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:291:2: note: in expansion of macro ‘MI_GFX8_TILE_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:542:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_10_0_sh_mask.h:5083:43: note: (near initialization for ‘mi_masks.GRPH_NUM_BANKS’)
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:155:28: note: in expansion of macro ‘GRPH_CONTROL__GRPH_NUM_BANKS_MASK’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:170:2: note: in expansion of macro ‘SFB’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.h:291:2: note: in expansion of macro ‘MI_GFX8_TILE_MASK_SH_LIST’
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:542:3: note: in expansion of macro ‘MI_DCE8_MASK_SH_LIST’

Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Leo Li &lt;sunpeng.li@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display/dc/dce100/dce100_resource: Make local functions and ones called by reference static</title>
<updated>2021-01-14T04:53:27Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2021-01-11T19:19:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fd5912f5b4d88a259f6f7a7edb7e40a54ac79f41'/>
<id>urn:sha1:fd5912f5b4d88a259f6f7a7edb7e40a54ac79f41</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:54:
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:614:22: warning: no previous prototype for ‘dce100_link_encoder_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:653:32: warning: no previous prototype for ‘dce100_opp_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:668:17: warning: no previous prototype for ‘dce100_aux_engine_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:706:20: warning: no previous prototype for ‘dce100_i2c_hw_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:721:22: warning: no previous prototype for ‘dce100_clock_source_create’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:745:6: warning: no previous prototype for ‘dce100_clock_source_destroy’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:834:6: warning: no previous prototype for ‘dce100_validate_bandwidth’ [-Wmissing-prototypes]
 drivers/gpu/drm/amd/amdgpu/../display/dc/dce100/dce100_resource.c:879:16: warning: no previous prototype for ‘dce100_validate_global’ [-Wmissing-prototypes]

Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Leo Li &lt;sunpeng.li@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable fp16 also on DCE-8/10/11.</title>
<updated>2021-01-05T16:35:22Z</updated>
<author>
<name>Mario Kleiner</name>
<email>mario.kleiner.de@gmail.com</email>
</author>
<published>2020-12-28T18:50:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4b6b7437b19d3116d409e747582c99152725288d'/>
<id>urn:sha1:4b6b7437b19d3116d409e747582c99152725288d</id>
<content type='text'>
The hw supports fp16, this is not only useful for HDR,
but also for standard dynamic range displays, because
it allows to get more precise color reproduction with
about 11 - 12 bpc linear precision in the unorm range
0.0 - 1.0.

Working fp16 scanout+display (and HDR over HDMI) was
verified on a DCE-8 asic, so i assume that the more
recent DCE-10/11 will work equally well, now that
format-specific plane scaling constraints are properly
enforced, e.g., the inability of fp16 to scale on older
hw like DCE-8 to DCE-11.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Mario Kleiner &lt;mario.kleiner.de@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Source minimum HBlank support</title>
<updated>2020-10-26T17:27:52Z</updated>
<author>
<name>Ashley Thomas</name>
<email>Ashley.Thomas2@amd.com</email>
</author>
<published>2020-10-01T07:16:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9248681f68b725d2647ca7dbae281c9b34977519'/>
<id>urn:sha1:9248681f68b725d2647ca7dbae281c9b34977519</id>
<content type='text'>
[Why]
Some sink devices wish to have access to the minimum
HBlank supported by the ASIC.

[How]
Make the ASIC minimum HBlank available in Source
Device information address 0x340.

Signed-off-by: Ashley Thomas &lt;Ashley.Thomas2@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unneeded break</title>
<updated>2020-10-23T19:33:47Z</updated>
<author>
<name>Tom Rix</name>
<email>trix@redhat.com</email>
</author>
<published>2020-10-19T14:43:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8d96a590ed0dd9c398e1ee14b3f8c7a324c588ff'/>
<id>urn:sha1:8d96a590ed0dd9c398e1ee14b3f8c7a324c588ff</id>
<content type='text'>
A break is not needed if it is preceded by a return or break

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Tom Rix &lt;trix@redhat.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add i2c speed arbitration for dc_i2c and hdcp_i2c</title>
<updated>2020-10-05T19:16:50Z</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2020-09-21T18:24:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b15cde19c32d8d543eae2e3cc7c51ba688b12551'/>
<id>urn:sha1:b15cde19c32d8d543eae2e3cc7c51ba688b12551</id>
<content type='text'>
[why]
HDCP 1.4 failed on SL8800 SW w/a test driver use.

[how]
Slow down the HW i2c speed when used by HW i2c.
This request: each acquired_i2c_engine setup the i2c speed needed
and sets the I2c engine for HDCP use at release_engine.

This covers SW using HW i2c engine and HDCP using HW i2c engine.
for dmcu using HW i2c engine, needs add similar logic in dmcu fw.

Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Eryk Brol &lt;eryk.brol@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: change from panel to panel cntl</title>
<updated>2020-04-22T22:11:48Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2020-04-08T17:31:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d4caa72e275c1920d38a9541b2e4dcc167733734'/>
<id>urn:sha1:d4caa72e275c1920d38a9541b2e4dcc167733734</id>
<content type='text'>
[Why]
it doesn't represent panel specifically, it's more like the control
logic for the panel

[How]
change from panel to panel cntl to make it a bit more clear

Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
