<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-04-25T21:10:17Z</updated>
<entry>
<title>drm/amd/display: Add Audio readback registers</title>
<updated>2022-04-25T21:10:17Z</updated>
<author>
<name>Ilya Bakoulin</name>
<email>Ilya.Bakoulin@amd.com</email>
</author>
<published>2022-03-28T21:43:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e955b5473294367c42e18faac9ab3348f3c8861c'/>
<id>urn:sha1:e955b5473294367c42e18faac9ab3348f3c8861c</id>
<content type='text'>
[Why]
Can be useful for verifying the correctness of audio output.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: revert "Reset fifo after enable otg"</title>
<updated>2022-02-02T23:26:31Z</updated>
<author>
<name>Zhan Liu</name>
<email>Zhan.Liu@amd.com</email>
</author>
<published>2022-01-28T14:03:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=702f8dd8319fa6e3fe9d90115426202e6ee5d06e'/>
<id>urn:sha1:702f8dd8319fa6e3fe9d90115426202e6ee5d06e</id>
<content type='text'>
[Why]
This change causes regression, that prevents some systems
from lighting up internal displays.

[How]
Revert this patch until a new solution is ready.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Zhan Liu &lt;Zhan.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Reset fifo after enable otg</title>
<updated>2021-11-22T19:45:01Z</updated>
<author>
<name>Xu, Jinze</name>
<email>JinZe.Xu@amd.com</email>
</author>
<published>2021-11-04T05:47:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=430bb83dbdf3c86768fcf2f6fba2982823261f6d'/>
<id>urn:sha1:430bb83dbdf3c86768fcf2f6fba2982823261f6d</id>
<content type='text'>
[Why]
In fast boot sequence, when change dispclk, otg is disabled but digfe
is enabled. This may cause dig fifo error.

[How]
Reset dig fifo after enable otg.

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: JinZe.Xu &lt;JinZe.Xu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DPCD writes at key points</title>
<updated>2021-09-14T19:57:09Z</updated>
<author>
<name>Leo (Hanghong) Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2021-08-15T18:17:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3550d6225b1ff8ce0429ad889848dc789edf56e8'/>
<id>urn:sha1:3550d6225b1ff8ce0429ad889848dc789edf56e8</id>
<content type='text'>
This reverts commit "Revert "Add DPCD writes at key points" ".
The following patch will fix the system hang issue.

v2: squash in indentation warning fix

Signed-off-by: Leo (Hanghong) Ma &lt;hanghong.ma@amd.com&gt;
Acked-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Aric Cyr &lt;aric.cyr@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add interface to get Calibrated Avg Level from FIFO</title>
<updated>2021-06-15T21:25:41Z</updated>
<author>
<name>Wesley Chalmers</name>
<email>Wesley.Chalmers@amd.com</email>
</author>
<published>2021-05-06T17:22:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a659f2fdf8b9b186c9324e05baa9e2835d47c7d2'/>
<id>urn:sha1:a659f2fdf8b9b186c9324e05baa9e2835d47c7d2</id>
<content type='text'>
[WHY]
Hardware has handed down a new sequence requiring the value of this
register be read from clk_mgr.

Signed-off-by: Wesley Chalmers &lt;Wesley.Chalmers@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Anson Jacob &lt;Anson.Jacob@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add missing DP_SEC register definitions and masks</title>
<updated>2020-12-15T16:33:33Z</updated>
<author>
<name>Max Tseng</name>
<email>chuan-yu.tseng@amd.com</email>
</author>
<published>2020-11-21T12:11:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=41aa4d3ded5cd7fa19cdc5f15fb60b85ed64f083'/>
<id>urn:sha1:41aa4d3ded5cd7fa19cdc5f15fb60b85ed64f083</id>
<content type='text'>
[Why]
some DP_SEC register defs and masks are missing.

[How]
add the missing defs and masks.

Signed-off-by: Max Tseng &lt;chuan-yu.tseng@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)</title>
<updated>2020-11-04T22:11:37Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-11-02T20:37:34Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=20f2ffe504728612d7b0c34e4f8280e34251e704'/>
<id>urn:sha1:20f2ffe504728612d7b0c34e4f8280e34251e704</id>
<content type='text'>
Avoids confusion in configurations.

v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled
v3: rebase on latest code

Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt; (v1)
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Rename set_mst_bandwidth to align with DP spec</title>
<updated>2020-09-15T21:52:41Z</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2020-08-18T22:42:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6c95320d01dcac321e9e89903a26a840838a0ef6'/>
<id>urn:sha1:6c95320d01dcac321e9e89903a26a840838a0ef6</id>
<content type='text'>
[Why]
The function set_mst_bandwidth is poorly name since it isn't clear what
it does, and it also does not reflect any part of the allocation sequence
described in the DP spec.

[How]
Rename the function set_mst_bandwidth to set_throttled_vcp_size.

Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Switch to immediate mode for updating infopackets</title>
<updated>2020-08-10T22:09:07Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2020-07-29T21:43:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=abba907c7a20032c2d504fd5afe3af7d440a09d0'/>
<id>urn:sha1:abba907c7a20032c2d504fd5afe3af7d440a09d0</id>
<content type='text'>
[Why]
Using FRAME_UPDATE will result in infopacket to be potentially updated
one frame late.
In commit stream scenarios for previously active stream, some stale
infopacket data from previous config might be erroneously sent out on
initial frame after stream is re-enabled.

[How]
Switch to using IMMEDIATE_UPDATE mode

Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Ashley Thomas &lt;Ashley.Thomas2@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN3 DIO</title>
<updated>2020-07-01T05:59:14Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2020-05-22T18:38:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=be547111d2be16e81dc2d9669cf3caa3675fa55d'/>
<id>urn:sha1:be547111d2be16e81dc2d9669cf3caa3675fa55d</id>
<content type='text'>
Add support for the DIO (Display IO)  block of DCN3, which entails our
stream and link encoders.

HW Blocks:

    +--------+
    |  DIO   |
    +--------+

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
