<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dcn10, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn10?h=linus%2Fmaster</id>
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<updated>2022-05-26T18:56:33Z</updated>
<entry>
<title>drm/amd/display: add Coverage blend mode for overlay plane</title>
<updated>2022-05-26T18:56:33Z</updated>
<author>
<name>Sung Joon Kim</name>
<email>Sungjoon.Kim@amd.com</email>
</author>
<published>2022-05-19T21:46:36Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=76818cdd11a25ac6cb1d98875719935d8d0e2e51'/>
<id>urn:sha1:76818cdd11a25ac6cb1d98875719935d8d0e2e51</id>
<content type='text'>
According to the KMS man page, there is a
"Coverage" alpha blend mode that assumes the
pixel color values have NOT been pre-multiplied
and will be done when the actual blending to
the background color values happens.

Previously, this mode hasn't been enabled
in our driver and it was assumed that all
normal overlay planes are pre-multiplied
by default.

When a 3rd party app is used to input a image
in a specific format, e.g. PNG, as a source
of a overlay plane to blend with the background
primary plane, the pixel color values are not
pre-multiplied. So by adding "Coverage" blend
mode, our driver will support those cases.

Issue fixed: Overlay plane alpha channel blending is incorrect
Issue tracker: https://gitlab.freedesktop.org/drm/amd/-/issues/1769

Reference:
https://dri.freedesktop.org/docs/drm/gpu/drm-kms.html#plane-composition-properties

Adding Coverage support also enables IGT
kms_plane_alpha_blend Coverage subtests:
1. coverage-7efc
2. coverage-vs-premult-vs-constant

Changes
1. Add DRM_MODE_BLEND_COVERAGE blend mode capability
2. Add "pre_multiplied_alpha" flag for Coverage case
3. Read the correct flag and set the DCN MPCC
pre_multiplied register bit (only on overlay plane)

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1769
Signed-off-by: Sung Joon Kim &lt;Sungjoon.Kim@amd.com&gt;
Reviewed-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add Audio readback registers</title>
<updated>2022-04-25T21:10:17Z</updated>
<author>
<name>Ilya Bakoulin</name>
<email>Ilya.Bakoulin@amd.com</email>
</author>
<published>2022-03-28T21:43:52Z</published>
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<id>urn:sha1:e955b5473294367c42e18faac9ab3348f3c8861c</id>
<content type='text'>
[Why]
Can be useful for verifying the correctness of audio output.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: make hubp1_wait_pipe_read_start() static</title>
<updated>2022-04-19T17:58:32Z</updated>
<author>
<name>Tales Lelo da Aparecida</name>
<email>tales.aparecida@gmail.com</email>
</author>
<published>2022-04-15T18:20:14Z</published>
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<id>urn:sha1:a26b9e0b9b153ace311245c8357715cb7ff0b727</id>
<content type='text'>
It's a local function, let's make it static.

AGD: remove prototype in dcn10_hubp.h

Signed-off-by: Tales Lelo da Aparecida &lt;tales.aparecida@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add odm seamless boot support</title>
<updated>2022-04-12T18:18:37Z</updated>
<author>
<name>Duncan Ma</name>
<email>Duncan.Ma@amd.com</email>
</author>
<published>2022-03-31T19:13:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=663d2daeaee6fa55530d8493979e9349070cd47c'/>
<id>urn:sha1:663d2daeaee6fa55530d8493979e9349070cd47c</id>
<content type='text'>
[WHY]
Implement changes to transition from Pre-OS odm to
Post-OS odm support. Seamless boot case is also
considered.

[HOW]
Revised validation logic when marking for seamless
boot. Init resources accordingly when Pre-OS has
odm enabled. Reset odm and det size when transitioning
Pre-OS odm to Post-OS non-odm to avoid corruption.
Apply logic to set odm accordingly upon commit.

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Duncan Ma &lt;Duncan.Ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix crash on setting VRR with no display connected</title>
<updated>2022-04-12T18:17:48Z</updated>
<author>
<name>Harry VanZyllDeJong</name>
<email>hvanzyll@amd.com</email>
</author>
<published>2022-01-11T20:11:42Z</published>
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<id>urn:sha1:da8c25929b78b39438eb62b87e213c45dfad6038</id>
<content type='text'>
[HOW&amp;WHY]
VRR was getting set at the same time
the timing generator would be null when there was no display
connected. Added null check to the timing generator variable
so it does not get referenced if it is null.

Reviewed-by: Harry Vanzylldejong &lt;harry.vanzylldejong@amd.com&gt;
Reviewed-by: Evgenii Krasnikov &lt;Evgenii.Krasnikov@amd.com&gt;
Reviewed-by: Nicholas Choi &lt;Nicholas.Choi@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Harry VanZyllDeJong &lt;hvanzyll@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: do not wait for mpc idle if tg is disabled</title>
<updated>2022-04-11T17:50:57Z</updated>
<author>
<name>Josip Pavic</name>
<email>Josip.Pavic@amd.com</email>
</author>
<published>2022-03-24T16:08:43Z</published>
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<id>urn:sha1:2513ed4f937999c0446fd824f7564f76b697d722</id>
<content type='text'>
[Why]
When booting, the driver waits for the MPC idle bit to be set as part of
pipe initialization. However, on some systems this occurs before OTG is
enabled, and since the MPC idle bit won't be set until the vupdate
signal occurs (which requires OTG to be enabled), this never happens and
the wait times out. This can add hundreds of milliseconds to the boot
time.

[How]
Do not wait for mpc idle if tg is disabled

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Josip Pavic &lt;Josip.Pavic@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: don't ignore alpha property on pre-multiplied mode</title>
<updated>2022-04-07T20:34:32Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-03-29T20:18:35Z</published>
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<id>urn:sha1:67229b27ed6fdb6bfce04f61ce4026c57b32ba15</id>
<content type='text'>
"Pre-multiplied" is the default pixel blend mode for KMS/DRM, as
documented in supported_modes of drm_plane_create_blend_mode_property():
https://cgit.freedesktop.org/drm/drm-misc/tree/drivers/gpu/drm/drm_blend.c

In this mode, both 'pixel alpha' and 'plane alpha' participate in the
calculation, as described by the pixel blend mode formula in KMS/DRM
documentation:

out.rgb = plane_alpha * fg.rgb +
          (1 - (plane_alpha * fg.alpha)) * bg.rgb

Considering the blend config mechanisms we have in the driver so far,
the alpha mode that better fits this blend mode is the
_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN, where the value for global_gain
is the plane alpha (global_alpha).

With this change, alpha property stops to be ignored. It also addresses
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1734

v2:
 * keep the 8-bit value for global_alpha_value (Nicholas)
 * correct the logical ordering for combined global gain (Nicholas)
 * apply to dcn10 too (Nicholas)

Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Tested-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Simon Ser &lt;contact@emersion.fr&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix missing-prototypes warning</title>
<updated>2022-04-05T14:29:48Z</updated>
<author>
<name>Becle Lee</name>
<email>becle.lee@amd.com</email>
</author>
<published>2022-03-28T03:18:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=24566aab61c98116e6c39db7b27b005f6d7776d8'/>
<id>urn:sha1:24566aab61c98116e6c39db7b27b005f6d7776d8</id>
<content type='text'>
[Why]
No declaration of hubp1_wait_pipe_read_start found in header file.

[How]
Add its declaration.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Becle Lee &lt;becle.lee@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove DC_FP_* wrapper from dml folder</title>
<updated>2022-04-01T03:05:54Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-03-26T20:24:48Z</published>
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<id>urn:sha1:9696679bf7ac40a8fb6a488a75bd66d4414cd3c3</id>
<content type='text'>
FPU documentation states that developers must not use DC_FP_START/END
inside dml files, but use this macro to wrap calls to FPU functions in
dc folder (outside dml folder). Therefore, this patch removes DC_FP_*
wrappers from dml folder and wraps calls for these FPU operations
outside dml, as required.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: detach fpu operations from dcn10_validate_bandwidth in calcs</title>
<updated>2022-04-01T03:05:54Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-03-26T20:24:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=851c5f242a03d7e9b00d2d1537d959e54fa101e8'/>
<id>urn:sha1:851c5f242a03d7e9b00d2d1537d959e54fa101e8</id>
<content type='text'>
dcn10_validate_bandwidth is only used on dcn10 files, but is declared in
dcn_calcs files. Rename dcn10_* to dcn_* in calcs, remove DC_FP_* wrapper
inside DML folder and create an specific dcn10_validate_bandwidth in
dcn10_resources that calls dcn_validate_bandwidth and properly wraps that
FPU function with DC_FP_* macro.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
