<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dcn303, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn303?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn303?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-29T13:41:44Z</updated>
<entry>
<title>drm/amd/display: Add debug option for exiting idle optimizations on cursor updates</title>
<updated>2022-09-29T13:41:44Z</updated>
<author>
<name>Brandon Syu</name>
<email>Brandon.Syu@amd.com</email>
</author>
<published>2022-09-15T10:16:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=936675464b1f481ad432d6a4fb75405c0abc71c7'/>
<id>urn:sha1:936675464b1f481ad432d6a4fb75405c0abc71c7</id>
<content type='text'>
[Description]
- Have option to exit idle opt on cursor updates
for debug and optimizations purposes

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Jasdeep Dhillon &lt;jdhillon@amd.com&gt;
Signed-off-by: Brandon Syu&lt;Brandon.Syu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Check correct bounds for stream encoder instances for DCN303</title>
<updated>2022-08-10T19:30:06Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-07-26T17:13:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=89b008222c2bf21e50219725caed31590edfd9d1'/>
<id>urn:sha1:89b008222c2bf21e50219725caed31590edfd9d1</id>
<content type='text'>
[Why &amp; How]
eng_id for DCN303 cannot be more than 1, since we have only two
instances of stream encoders.

Check the correct boundary condition for engine ID for DCN303 prevent
the potential out of bounds access.

Fixes: cd6d421e3d1a ("drm/amd/display: Initial DC support for Beige Goby")
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add dc_ctx to link_enc_create() parameters</title>
<updated>2022-07-25T21:17:28Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-04-01T19:29:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e216431b63aef8b7d9cf6e59aea39582d48b1808'/>
<id>urn:sha1:e216431b63aef8b7d9cf6e59aea39582d48b1808</id>
<content type='text'>
[Why&amp;How]
Preparation to enable run time initialization of register offsets to add
dc_context to the link_enc_create callback. This is needed to get the
dc_ctx handle where register offset initialization routine is called.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move FPU associated DCN30 code to DML folder</title>
<updated>2022-05-26T18:56:31Z</updated>
<author>
<name>Jasdeep Dhillon</name>
<email>jdhillon@amd.com</email>
</author>
<published>2022-05-06T17:03:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e4b0eac3e6242abf5f5ebcffdeb852e7ffa1c3d0'/>
<id>urn:sha1:e4b0eac3e6242abf5f5ebcffdeb852e7ffa1c3d0</id>
<content type='text'>
[why &amp; how]
As part of the FPU isolation work documented in
https://patchwork.freedesktop.org/series/93042/, isolate
code that uses FPU in DCN30 to DML, where all FPU code
should locate.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Jasdeep Dhillon &lt;jdhillon@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: move FPU associated DCN303 code to DML folder</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Jasdeep Dhillon</name>
<email>jasdeep.dhillon@amd.com</email>
</author>
<published>2022-02-24T15:56:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=53923e62afad6f52b2b931a74d2ee10274051b28'/>
<id>urn:sha1:53923e62afad6f52b2b931a74d2ee10274051b28</id>
<content type='text'>
[Why &amp; How]
As part of the FPU isolation work documented in
https://patchwork.freedesktop.org/series/93042/, isolate
code that uses FPU in DCN303 to DML, where all FPU code
should locate.

Co-authored-by: Jasdeep Dhillon &lt;jasdeep.dhillon@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Jasdeep Dhillon &lt;jasdeep.dhillon@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs</title>
<updated>2022-02-07T23:03:50Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-02-03T18:04:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4a5dc6c73dbec54648fe01af2f1818dc3ae90d5d'/>
<id>urn:sha1:4a5dc6c73dbec54648fe01af2f1818dc3ae90d5d</id>
<content type='text'>
To align with other headers.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add reg defs for DCN303</title>
<updated>2021-12-30T13:54:44Z</updated>
<author>
<name>Wesley Chalmers</name>
<email>Wesley.Chalmers@amd.com</email>
</author>
<published>2021-12-08T19:25:08Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2ca6c483ed2d73ff263457c166527abdb82bba06'/>
<id>urn:sha1:2ca6c483ed2d73ff263457c166527abdb82bba06</id>
<content type='text'>
[WHY]
These registers are currently missing from the DCN303 header files

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: George Shen &lt;George.Shen@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wesley Chalmers &lt;Wesley.Chalmers@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Changed pipe split policy to allow for multi-display pipe split</title>
<updated>2021-12-30T13:54:44Z</updated>
<author>
<name>Angus Wang</name>
<email>angus.wang@amd.com</email>
</author>
<published>2021-12-09T22:27:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=458c79a86ae1081636942ba3c42bf0424f3c6970'/>
<id>urn:sha1:458c79a86ae1081636942ba3c42bf0424f3c6970</id>
<content type='text'>
[WHY]
Current implementation of pipe split policy prevents pipe split with
multiple displays connected, which caused the MCLK speed to be stuck at
max

[HOW]
Changed the pipe split policies so that pipe split is allowed for
multi-display configurations

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Angus Wang &lt;angus.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: append missing includes</title>
<updated>2021-12-13T21:32:34Z</updated>
<author>
<name>Isabella Basso</name>
<email>isabbasso@riseup.net</email>
</author>
<published>2021-12-08T01:25:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=64cf26f04ad05ac7b4fc7d3339d893f21a06cab1'/>
<id>urn:sha1:64cf26f04ad05ac7b4fc7d3339d893f21a06cab1</id>
<content type='text'>
This fixes warnings caused by global functions lacking prototypes:, such as:

 warning: no previous prototype for 'dcn303_hw_sequencer_construct'
 [-Wmissing-prototypes]
 12 | void dcn303_hw_sequencer_construct(struct dc *dc)
    |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 ...
 warning: no previous prototype for ‘amdgpu_has_atpx’
 [-Wmissing-prototypes]
 76 | bool amdgpu_has_atpx(void) {
    |      ^~~~~~~~~~~~~~~

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Isabella Basso &lt;isabbasso@riseup.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Enable P010 for DCN3x ASICs</title>
<updated>2021-12-01T21:04:56Z</updated>
<author>
<name>Stylon Wang</name>
<email>stylon.wang@amd.com</email>
</author>
<published>2021-11-12T12:05:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebe5ffd8e271e328f33c4bc5cb8cea2b4cf8e058'/>
<id>urn:sha1:ebe5ffd8e271e328f33c4bc5cb8cea2b4cf8e058</id>
<content type='text'>
[Why + How]
Enable P010 for SDR video applications.

Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Reviewed-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
