<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dcn316, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dcn316?h=linus%2Fmaster</id>
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<updated>2022-04-28T21:44:02Z</updated>
<entry>
<title>drm/amd/display: protect remaining FPU-code calls on dcn3.1.x</title>
<updated>2022-04-28T21:44:02Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-03-30T23:02:04Z</published>
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<id>urn:sha1:7324d02a6545414fff3bcd2c6e95b9e1041a327e</id>
<content type='text'>
From [1], I realized two other calls to dcn30 code are associated with
FPU operations and are not protected by DC_FP_* macros:
* dcn30_populate_dml_writeback_from_context()
* dcn30_set_mcif_arb_params()

So, since FPU-associated code is not fully isolated in dcn30, and
dcn3.1.x reuses them, let's wrap their calls properly.

Note: this patch complements the fix from [1].

[1] https://lore.kernel.org/amd-gfx/20220329082957.1662655-1-chandan.vurdigerenataraj@amd.com/

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove SW w/a for HDCP 1.4 1A-07 failure based on ECO fix</title>
<updated>2022-04-01T02:54:30Z</updated>
<author>
<name>Oliver Logush</name>
<email>oliver.logush@amd.com</email>
</author>
<published>2022-03-10T16:16:09Z</published>
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<id>urn:sha1:71d7a553645f9aba80b318ee5b4385d264ac3efa</id>
<content type='text'>
[why]
W/a no longer needed

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Oliver Logush &lt;oliver.logush@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: move FPU related code from dcn316 to dml/dcn31 folder</title>
<updated>2022-03-25T16:40:26Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-03-07T15:48:01Z</published>
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<id>urn:sha1:3f8951cc123f102a4e21d61390993bc7d142b723</id>
<content type='text'>
Moves FPU-related structs and dcn316_update_bw_bounding_box from dcn316
driver to dml/dcn31 that centralize FPU operations for DCN 3.1x

Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Reviewed-by: Alex Hung &lt;alex.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: move FPU-related code from dcn20 to dml folder</title>
<updated>2022-03-15T18:25:16Z</updated>
<author>
<name>Melissa Wen</name>
<email>mwen@igalia.com</email>
</author>
<published>2022-02-23T23:27:25Z</published>
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<id>urn:sha1:cf689e869cf0339c387397c7a6805e387594656d</id>
<content type='text'>
Move parts of dcn20 code that uses FPU to dml folder. It aims to isolate
FPU operations as described by series:

drm/amd/display: Introduce FPU directory inside DC
https://patchwork.freedesktop.org/series/93042/

This patch moves the following functions from dcn20_resource to
dml/dcn20_fpu and calls of public functions in dcn20_resource are
wrapped by DC_FP_START/END():

- void dcn20_populate_dml_writeback_from_context
- static bool is_dtbclk_required()
- static enum dcn_zstate_support_state()
- void dcn20_calculate_dlg_params()
- static void swizzle_to_dml_params()
- int dcn20_populate_dml_pipes_from_context()
- void dcn20_calculate_wm()
- void dcn20_cap_soc_clocks()
- void dcn20_update_bounding_box()
- void dcn20_patch_bounding_box()
- bool dcn20_validate_bandwidth_fp()

This movement also affects dcn21/30/31, as dcn20_calculate_dlg_params()
is used by them. For this reason, I included dcn20_fpu headers in
dcn20_resource headers to make dcn20_calculate_dlg_params() visible to
dcn21/30/31.

Three new functions are created to isolate well-delimited FPU
operations:

- void dcn20_fpu_set_wb_arb_params(): set cli_watermark,
  pstate_watermark and time_per_pixel from wb_arb_params (struct
mcif_arb_params), since those uses FPU operations on double types:
WritebackUrgentWatermark, WritebackDRAMClockChangeWatermark, '16.0'.
- void dcn20_fpu_set_wm_ranges(): set min_fill_clk_mhz and
  max_fill_clk_mhz involves FPU calcs on dram_speed_mts (double type);
- void dcn20_fpu_adjust_dppclk(): adjust operation on RequiredDPPCLK
  that is a double.

Signed-off-by: Melissa Wen &lt;mwen@igalia.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: merge two duplicated clock_source_create</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2022-02-24T17:57:23Z</published>
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<id>urn:sha1:305f098020920f9ea6ff9162ee46392f4d67e67f</id>
<content type='text'>
[why]
dcn31x could use dcn31 sepcific which contains deep_color_ratio for dmub

Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Reviewed-by: Hansen Dsouza &lt;hansen.dsouza@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix deep color ratio</title>
<updated>2022-03-15T18:25:15Z</updated>
<author>
<name>Hansen Dsouza</name>
<email>Hansen.Dsouza@amd.com</email>
</author>
<published>2022-02-19T00:53:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=df5a07c45c68fd85cd4d1a4ad7892d3a717a4ccf'/>
<id>urn:sha1:df5a07c45c68fd85cd4d1a4ad7892d3a717a4ccf</id>
<content type='text'>
Fix enum mapping for deep color ratio

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DCN316 resource and SMU clock manager</title>
<updated>2022-02-17T20:58:45Z</updated>
<author>
<name>Hansen Dsouza</name>
<email>Hansen.Dsouza@amd.com</email>
</author>
<published>2022-01-26T20:44:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c477eaa6a79da6af7e59f74e69af7d6b3af52a23'/>
<id>urn:sha1:c477eaa6a79da6af7e59f74e69af7d6b3af52a23</id>
<content type='text'>
Add core DC implementation for DCN316.

Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
