linux-dev/drivers/gpu/drm/amd/display/dc/dcn316, branch master

drm/amd/display: Refactor edp ILR caps codes

2022-10-06T16:00:02Z

We split out ILR config from "global" to "per-panel" config settings. Reviewed-by: Anthony Koo Acked-by: Hamza Mahfooz Signed-off-by: Ian Chen Signed-off-by: Alex Deucher

drm/amd/display: Cleanup PSR flag

2022-08-29T21:58:47Z

[Why] enable_sw_cntl_psr flag is not needed. For PSR1 and PSR2, we should be passing dirty rectangle and cursor updates to FW regardless of enable_sw_cntl_psr flag. [How] Remove enable_sw_cntl_psr flag from driver. Send cursor info and dirty rectagle status to dmub only in the case of dcn31 and above. Reviewed-by: Anthony Koo Reviewed-by: Robin Chen Acked-by: Brian Chang Signed-off-by: Gabe Teeger Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: make variables static

2022-08-10T18:57:49Z

As "dcn3_1_soc", "dcn3_15_soc", and "dcn3_16_soc" are not used outside of their corresponding "dcn3*_fpu.c", make them static and remove their extern declaration. Fixes: 26f4712aedbd ("drm/amd/display: move FPU related code from dcn31 to dml/dcn31 folder") Fixes: fa896297b31b ("drm/amd/display: move FPU related code from dcn315 to dml/dcn31 folder") Fixes: 3f8951cc123f ("drm/amd/display: move FPU related code from dcn316 to dml/dcn31 folder") Signed-off-by: Magali Lemes Reviewed-by: Rodrigo Siqueira Reviewed-by: Maíra Canal Reviewed-by: Melissa Wen Signed-off-by: Alex Deucher

drm/amd/display: Add dc_ctx to link_enc_create() parameters

2022-07-25T21:17:28Z

[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by: Rodrigo Siqueira Acked-by: Alan Liu Acked-by: Alex Hung Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: fix soft-fp vs hard-fp on DCN 3.1 family for powerpc

2022-07-25T13:31:05Z

Move remaining FPU code to DML folder that caused compilation error for powerpc. This patch depends on [1] to prevent the error below: /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.o /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.o [1] https://lore.kernel.org/amd-gfx/20220716195144.342960-1-mwen@igalia.com/ Reported-by: Guenter Roeck Signed-off-by: Melissa Wen Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: rename hdmi_frl_pcon_support

2022-07-05T20:17:39Z

hdmi_frl_pcon_support has been the source of confusion. So, rename it to dp_hdmi21_pcon_support. Signed-off-by: Hamza Mahfooz Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: enable PCON SST support for newer ASICs

2022-07-05T20:17:30Z

Generic PCON SST support already exists and works for newer ASICs. So, enable it by default. Acked-by: Rodrigo Siqueira Signed-off-by: Hamza Mahfooz Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Enable 3 plane MPO

2022-06-07T20:09:57Z

[why and how] 3 plane MPO is a new feature missing in a few resource files Enable 3 plane MPO by setting slave planes to 2 Reviewed-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Hamza Mahfooz Signed-off-by: Hansen Dsouza Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: protect remaining FPU-code calls on dcn3.1.x

2022-04-28T21:44:02Z

From [1], I realized two other calls to dcn30 code are associated with FPU operations and are not protected by DC_FP_* macros: * dcn30_populate_dml_writeback_from_context() * dcn30_set_mcif_arb_params() So, since FPU-associated code is not fully isolated in dcn30, and dcn3.1.x reuses them, let's wrap their calls properly. Note: this patch complements the fix from [1]. [1] https://lore.kernel.org/amd-gfx/20220329082957.1662655-1-chandan.vurdigerenataraj@amd.com/ Reviewed-by: Rodrigo Siqueira Signed-off-by: Melissa Wen Signed-off-by: Alex Deucher

drm/amd/display: Remove SW w/a for HDCP 1.4 1A-07 failure based on ECO fix

2022-04-01T02:54:30Z

[why] W/a no longer needed Reviewed-by: Charlene Liu Acked-by: Alex Hung Signed-off-by: Oliver Logush Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher