<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dml/dcn314, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dml/dcn314?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dml/dcn314?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-11-09T22:59:10Z</updated>
<entry>
<title>drm/amd/display: Update SR watermarks for DCN314</title>
<updated>2022-11-09T22:59:10Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2022-10-25T15:26:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=632d06985235d988c9d7e6eec8fa655be0761fd0'/>
<id>urn:sha1:632d06985235d988c9d7e6eec8fa655be0761fd0</id>
<content type='text'>
[Why &amp; How]
New values requested by hardware after fine-tuning.
Update for all memory types.

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.0.x
</content>
</entry>
<entry>
<title>drm/amd/display: Reduce number of arguments of dml314's CalculateFlipSchedule()</title>
<updated>2022-09-20T16:42:32Z</updated>
<author>
<name>Nathan Chancellor</name>
<email>nathan@kernel.org</email>
</author>
<published>2022-09-16T21:06:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=25ea501ed85dc3c224db73fb79d38b6109c1ad99'/>
<id>urn:sha1:25ea501ed85dc3c224db73fb79d38b6109c1ad99</id>
<content type='text'>
Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml314_ModeSupportAndSystemConfigurationFull() uses by 112 bytes with
LLVM 16 (1976 -&gt; 1864), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:4020:6: error: stack frame size (2216) exceeds limit (2048) in 'dml314_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1710
Reported-by: "kernelci.org bot" &lt;bot@kernelci.org&gt;
Tested-by: Maíra Canal &lt;mairacanal@riseup.net&gt;
Signed-off-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Reduce number of arguments of dml314's CalculateWatermarksAndDRAMSpeedChangeSupport()</title>
<updated>2022-09-20T16:42:26Z</updated>
<author>
<name>Nathan Chancellor</name>
<email>nathan@kernel.org</email>
</author>
<published>2022-09-16T21:06:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ca07f4f5a98b96211a2a8fe51b35c039720be888'/>
<id>urn:sha1:ca07f4f5a98b96211a2a8fe51b35c039720be888</id>
<content type='text'>
Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml314_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with
LLVM 16 (2216 -&gt; 1976), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:4020:6: error: stack frame size (2216) exceeds limit (2048) in 'dml314_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1710
Reported-by: "kernelci.org bot" &lt;bot@kernelci.org&gt;
Tested-by: Maíra Canal &lt;mairacanal@riseup.net&gt;
Signed-off-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Modify DML to adjust Vstartup Position</title>
<updated>2022-09-19T19:16:19Z</updated>
<author>
<name>muansari</name>
<email>muansari@amd.com</email>
</author>
<published>2022-09-01T17:21:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9680810f91f2591b16b76f73d1e0d49af874be0a'/>
<id>urn:sha1:9680810f91f2591b16b76f73d1e0d49af874be0a</id>
<content type='text'>
[WHY]
The Vstartup position should be as late as possible to
maximize power saving with the current. Calculation of
Vstartup in DML does not take into account as SDP signal.

[HOW]
Made necessary changes to calculate the correct Vstartup
position in DML to account for AS SDP
* Overriding the VBlankNom value in certain cases
  otherwise it will use the default value
* Bypassing the condition for adjust_sync_Vstartup
* Overriding vblank_nom_input with VBlankNom that is
  set in the SW Layer

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: muansari &lt;muansari@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add debug option for dramclk_change_latency in apu</title>
<updated>2022-09-19T19:09:05Z</updated>
<author>
<name>Charlene Liu</name>
<email>Charlene.Liu@amd.com</email>
</author>
<published>2022-08-29T21:32:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fcd3e58f09952d836d2f491444292be2d8bcf7c5'/>
<id>urn:sha1:fcd3e58f09952d836d2f491444292be2d8bcf7c5</id>
<content type='text'>
[Why &amp; How]
Support dramclk change latency change via debug option and add some
code isolation.

Reviewed-by: Martin Leung &lt;Martin.Leung@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: clean up some inconsistent indentings</title>
<updated>2022-09-19T19:08:04Z</updated>
<author>
<name>Yang Li</name>
<email>yang.lee@linux.alibaba.com</email>
</author>
<published>2022-09-15T01:58:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=822a9778289b9be9f29b02ccaae81d36c979f40b'/>
<id>urn:sha1:822a9778289b9be9f29b02ccaae81d36c979f40b</id>
<content type='text'>
clean up some inconsistent indentings

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2181
Reported-by: Abaci Robot &lt;abaci@linux.alibaba.com&gt;
Signed-off-by: Yang Li &lt;yang.lee@linux.alibaba.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Correct dram channel width for dcn314</title>
<updated>2022-09-13T18:33:00Z</updated>
<author>
<name>Duncan Ma</name>
<email>duncan.ma@amd.com</email>
</author>
<published>2022-08-24T18:35:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=247a94a627dbd9fed370b575288b874ef4a01991'/>
<id>urn:sha1:247a94a627dbd9fed370b575288b874ef4a01991</id>
<content type='text'>
[Why]
The interpretation of the number of memory channels
differ by memory type, and this affects channel width
for the DML input.

[How]
Set dram channel width according to memory type for
dcn314.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Duncan Ma &lt;duncan.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Relax swizzle checks for video non-RGB formats on DCN314</title>
<updated>2022-09-13T18:33:00Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2022-08-24T14:51:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e7dbdfa226ce621931a84f60e885d42c232fb990'/>
<id>urn:sha1:e7dbdfa226ce621931a84f60e885d42c232fb990</id>
<content type='text'>
[Why]
HW can support the display swizzle modes for video, and those are
preferable over standard or linear for decode use.

[How]
Remove the check for DCN314.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Hook up DCN314 specific dml implementation</title>
<updated>2022-09-13T18:32:59Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2022-08-24T13:24:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d56e38d51cbc902a27f8b2ba244bb6a8950e8a7c'/>
<id>urn:sha1:d56e38d51cbc902a27f8b2ba244bb6a8950e8a7c</id>
<content type='text'>
[Why &amp; How]
Add support for the DML314 functions and hook up DCN314 to use them.

This has some necessary additions for calculating Max VSTARTUP for
future features, but there's also some changes that we have to make
for pixel format/swizzle support.

That will come in a following patch to make this transition easier to
bisect.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix compilation errors on DCN314</title>
<updated>2022-09-13T18:32:59Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2022-09-01T20:00:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=34e205112ec078ed1b24e30d90af81e43bc12f4e'/>
<id>urn:sha1:34e205112ec078ed1b24e30d90af81e43bc12f4e</id>
<content type='text'>
We have some compilation errors in some DML files from DCN314 that we
never noticed because we were not compiling some of the DML files. This
commit fixes those syntax errors before we enable the compilation.

Cc: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
