<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dc/dml/dcn321, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dml/dcn321?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dc/dml/dcn321?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-11-09T23:04:13Z</updated>
<entry>
<title>drm/amd/display: Enforce minimum prefetch time for low memclk on DCN32</title>
<updated>2022-11-09T23:04:13Z</updated>
<author>
<name>Dillon Varone</name>
<email>Dillon.Varone@amd.com</email>
</author>
<published>2022-10-27T20:22:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ce902d987a8caa5c9a96080e280ecc992414a127'/>
<id>urn:sha1:ce902d987a8caa5c9a96080e280ecc992414a127</id>
<content type='text'>
[WHY?]
Data return times when using lowest memclk can be &lt;= 60us, which can cause
underflow on high bandwidth displays with a workload.

[HOW?]
Enforce a minimum prefetch time during validation for low memclk modes.

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Dillon Varone &lt;Dillon.Varone@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DSC delay factor workaround</title>
<updated>2022-11-02T21:16:25Z</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2022-10-14T21:46:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d5e0fb0d9dea545defb963ec1073bd9a1a8b5395'/>
<id>urn:sha1:d5e0fb0d9dea545defb963ec1073bd9a1a8b5395</id>
<content type='text'>
[Why]
Certain 4K high refresh rate modes requiring DSC are exhibiting top
of screen underflow corruption. Increasing the DSC delay by a factor
of 6 percent stops the underflow for most use cases.

[How]
Multiply DSC delay requirement in DML by a factor.
Add debug option to make this DSC delay factor configurable.

Reviewed-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update latencies on DCN321</title>
<updated>2022-11-02T20:49:50Z</updated>
<author>
<name>Dillon Varone</name>
<email>Dillon.Varone@amd.com</email>
</author>
<published>2022-10-20T15:46:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c580d758ba1b79de9ea7a475d95a6278736ae462'/>
<id>urn:sha1:c580d758ba1b79de9ea7a475d95a6278736ae462</id>
<content type='text'>
Update DF related latencies based on new measurements.

Tested-by: Mark Broadworth &lt;mark.broadworth@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Dillon Varone &lt;Dillon.Varone@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.0.x
</content>
</entry>
<entry>
<title>drm/amd/display: Fix urgent latency override for DCN32/DCN321</title>
<updated>2022-09-19T19:13:37Z</updated>
<author>
<name>George Shen</name>
<email>george.shen@amd.com</email>
</author>
<published>2022-09-01T19:03:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e7f2f4cd67443ce308480ca461806fcc3456e0ba'/>
<id>urn:sha1:e7f2f4cd67443ce308480ca461806fcc3456e0ba</id>
<content type='text'>
[Why]
The urgent latency override is useful when debugging issues
relating to underflow.

Current overridden variable is not correct and has no effect
on DCN3.2 and DCN3.21 DML calculations.

[How]
For DCN3.2 and DCN3.21, override the correct urgent latency
variable when bounding box override is present.

Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Reviewed-by: Nevenko Stupar &lt;Nevenko.Stupar@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: clean up some inconsistent indentings</title>
<updated>2022-08-29T22:00:55Z</updated>
<author>
<name>Yang Li</name>
<email>yang.lee@linux.alibaba.com</email>
</author>
<published>2022-08-29T08:36:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6234bf13913fb7f62bb4ce2ced42fb81c524e851'/>
<id>urn:sha1:6234bf13913fb7f62bb4ce2ced42fb81c524e851</id>
<content type='text'>
The indentation of statements in the same curly bracket should be
consistent.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1886
Reported-by: Abaci Robot &lt;abaci@linux.alibaba.com&gt;
Signed-off-by: Yang Li &lt;yang.lee@linux.alibaba.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a variable to update FCLK latency</title>
<updated>2022-08-10T19:11:44Z</updated>
<author>
<name>Alvin Lee</name>
<email>alvin.lee2@amd.com</email>
</author>
<published>2022-07-20T17:16:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0cd34ce82b0a9ce503d35a51bff47ba3b6715557'/>
<id>urn:sha1:0cd34ce82b0a9ce503d35a51bff47ba3b6715557</id>
<content type='text'>
[Description]
Add a variable to update FCLK latency

Reviewed-by: Martin Leung &lt;Martin.Leung@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update DCN32 and DCN321 SR latencies</title>
<updated>2022-07-25T21:17:43Z</updated>
<author>
<name>Alvin Lee</name>
<email>Alvin.Lee2@amd.com</email>
</author>
<published>2022-05-19T18:03:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=493af96d61b1361a44d016057e0fc6e5d4c92fc7'/>
<id>urn:sha1:493af96d61b1361a44d016057e0fc6e5d4c92fc7</id>
<content type='text'>
Update worst case SR latencies according to values measured by hardware
team.

Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Drop FPU code from dcn321 resource</title>
<updated>2022-07-25T13:31:04Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2022-07-08T20:07:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=352b25a770712a954b1def1b8c6429b0825ee0b3'/>
<id>urn:sha1:352b25a770712a954b1def1b8c6429b0825ee0b3</id>
<content type='text'>
This commit fully move the missing FPU operations from dcn321 resource
to dcn321 fpu. It also remove those FPU flags from the Makefile.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Create dcn321_fpu file</title>
<updated>2022-07-25T13:31:04Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2022-07-08T19:53:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=197485c695430ab03d9f4a96aab4d4f76787f7c9'/>
<id>urn:sha1:197485c695430ab03d9f4a96aab4d4f76787f7c9</id>
<content type='text'>
The file dcn321_resource has a lot of FPU operations that should be
inside the dml folder. This commit introduces the dcn321_fpu file and
moves some of the FPU operation functions to this new file.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
