<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/dmub, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dmub?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/dmub?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-10T21:32:55Z</updated>
<entry>
<title>drm/amd/display: Use set_vtotal_min_max to configure OTG VTOTAL</title>
<updated>2022-10-10T21:32:55Z</updated>
<author>
<name>Rodrigo Siqueira</name>
<email>Rodrigo.Siqueira@amd.com</email>
</author>
<published>2021-03-12T16:58:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=15e8b368981e1e8420f08b35bb12b794b200f4a0'/>
<id>urn:sha1:15e8b368981e1e8420f08b35bb12b794b200f4a0</id>
<content type='text'>
In multiple parts of the DCN code, we write directly to the
OTG_V_TOTAL_* registers in some OPTC functions. Let's avoid it by using
the set_vtotal_min_max.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Display does not light up after S4 resume</title>
<updated>2022-10-10T21:32:55Z</updated>
<author>
<name>Meenakshikumar Somasundaram</name>
<email>meenakshikumar.somasundaram@amd.com</email>
</author>
<published>2022-09-30T03:55:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6f4f8ff567c48823f8279206e236643e8e8f377e'/>
<id>urn:sha1:6f4f8ff567c48823f8279206e236643e8e8f377e</id>
<content type='text'>
[Why]
Dpia hpd interrupt processing is disabled when entering S4/S0i3 and
would be reenabled after detection completes during resuming. Because,
keeping hpd interrupts enabled during detection leads to multiple
detections for the same hpd transition. There is a S4 case where dpia
hpd interrupt is missed when driver is in transitioning from hpd
interrupt processing disable to enable and the display does not light
up.

[How]
- Added dmub inbox command DMUB_CMD__DPIA_HPD_INT_ENABLE to explicitly
control dmub to issue dpia hpd interrupt or not. If dpia hpd interrupt
is disabled, dmub will keep the hpd pending and post it once driver
reenables dpia hpd interrupt or when querying with
DMUB_CMD__QUERY_HPD_STATE.
- Added dmub boot option dpia_hpd_int_enable_supported to notify dmub
about whether DMUB_CMD__DPIA_HPD_INT_ENABLE command would be used.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Mustapha Ghaddar &lt;Mustapha.Ghaddar@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Meenakshikumar Somasundaram &lt;meenakshikumar.somasundaram@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Use the same cursor info across features</title>
<updated>2022-10-10T21:32:55Z</updated>
<author>
<name>Max Tseng</name>
<email>Max.Tseng@amd.com</email>
</author>
<published>2022-10-02T12:45:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b73353f7f3d434e90da9f0e127bba1fe26cb1287'/>
<id>urn:sha1:b73353f7f3d434e90da9f0e127bba1fe26cb1287</id>
<content type='text'>
Since different features would need to update cursor registers, However,
they would use different approaches.

To unify varied methods, this refactor is implemented the same update
cursor info method for current varied features.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Max Tseng &lt;Max.Tseng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Cursor Info Update refactor</title>
<updated>2022-09-29T13:41:45Z</updated>
<author>
<name>Max Tseng</name>
<email>max.tseng@amd.com</email>
</author>
<published>2022-09-15T03:32:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e18d9839b174d6bfa0d620293098b3c6a441cc4b'/>
<id>urn:sha1:e18d9839b174d6bfa0d620293098b3c6a441cc4b</id>
<content type='text'>
Dc: cursor info update: phase 1:

[Why]

Different feature might need to update cursor info, but
With different approaches.
To unify this diversity problem, all features should use
The same interface to update cursor.

Reviewed-by: Reza Amini &lt;reza.amini@amd.com&gt;
Acked-by: Jasdeep Dhillon &lt;jdhillon@amd.com&gt;
Signed-off-by: Max Tseng &lt;max.tseng@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.134.0</title>
<updated>2022-09-19T19:12:56Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2022-09-04T01:31:04Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1591a6478fbc61a0b30765a3c2b222fc50db849e'/>
<id>urn:sha1:1591a6478fbc61a0b30765a3c2b222fc50db849e</id>
<content type='text'>
- Handle pipe split case for SubVP:
  Pass in pipe split index for main and phantom pipes

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.132.0</title>
<updated>2022-08-29T21:59:29Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2022-08-20T13:04:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0991f44c90f64c4e4d97982d5702ab18449c99d4'/>
<id>urn:sha1:0991f44c90f64c4e4d97982d5702ab18449c99d4</id>
<content type='text'>
- Fix comment to indicate correct visual confirm option

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add support for visual confirm color</title>
<updated>2022-08-29T21:58:47Z</updated>
<author>
<name>Leo (Hanghong) Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2022-07-29T15:46:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b09c1fff5a9350a65b16af44e74c9f9335d9ef09'/>
<id>urn:sha1:b09c1fff5a9350a65b16af44e74c9f9335d9ef09</id>
<content type='text'>
[Why]
We want to get the visual confirm color of the bottom-most pipe
for test automation.

[How]
Save the visual confirm color to plane_state before program to MPC;

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Leo (Hanghong) Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.130.0</title>
<updated>2022-08-25T17:19:29Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2022-08-08T03:38:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0acc5b06b5b450b351aa006c70264baf3062e988'/>
<id>urn:sha1:0acc5b06b5b450b351aa006c70264baf3062e988</id>
<content type='text'>
- For SubVP add scaling factor to allow firmware to calculate
 accurate line to start programming

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Brian Chang &lt;Brian.Chang@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add support for manual DMUB FAMS trigger</title>
<updated>2022-07-25T21:17:15Z</updated>
<author>
<name>Anthony Koo</name>
<email>Anthony.Koo@amd.com</email>
</author>
<published>2022-07-17T03:14:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=81f776b670a0eb17bf9cfbfd2df32f66a34bc453'/>
<id>urn:sha1:81f776b670a0eb17bf9cfbfd2df32f66a34bc453</id>
<content type='text'>
- Add is_drr parameter to indicate DRR is enabled on
the panel to determine whether SubVP MCLK switch
logic should be enabled

- Add DRR manual trigger in FW (instead of driver)
because manual trigger programming triggers DRR
update pending and can block SubVP MCLK switches
from taking place

Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DMUB support for DCN314</title>
<updated>2022-07-14T00:57:05Z</updated>
<author>
<name>Roman Li</name>
<email>roman.li@amd.com</email>
</author>
<published>2022-06-28T22:38:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=cc35e75273fcf4fb4f12f9d8fd979be7aa808041'/>
<id>urn:sha1:cc35e75273fcf4fb4f12f9d8fd979be7aa808041</id>
<content type='text'>
Initialize DMUB for DCN 3.1.4.
Use same funcs as DCN31.

Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
