<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/modules/freesync, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules/freesync?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules/freesync?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-08-10T19:12:13Z</updated>
<entry>
<title>drm/amd/display: Fix HDMI VSIF V3 incorrect issue</title>
<updated>2022-08-10T19:12:13Z</updated>
<author>
<name>Leo Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2022-07-22T17:42:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0591183699fceeafb4c4141072d47775de83ecfb'/>
<id>urn:sha1:0591183699fceeafb4c4141072d47775de83ecfb</id>
<content type='text'>
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move all linux includes into OS types</title>
<updated>2022-07-05T20:16:49Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2019-11-22T15:12:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09de5cd2c170b19e04e37439a712da52a0535015'/>
<id>urn:sha1:09de5cd2c170b19e04e37439a712da52a0535015</id>
<content type='text'>
Move all linux includes into OS types.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add vrr_active_variable to dc_stream_update</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Harry VanZyllDeJong</name>
<email>harry.vanzylldejong@amd.com</email>
</author>
<published>2021-05-10T23:30:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebfb15262af3bec6c3cc263ce04164e44eea4b30'/>
<id>urn:sha1:ebfb15262af3bec6c3cc263ce04164e44eea4b30</id>
<content type='text'>
[WHY]
The display driver on some OSes need to track it in order to
perform memory clock switching decisions.

[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry VanZyllDeJong &lt;harry.vanzylldejong@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Firmware assisted MCLK switch and FS</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Felipe Clark</name>
<email>felipe.clark@amd.com</email>
</author>
<published>2021-03-07T18:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c2fbe663ec4f991832d67f936d3941f781884156'/>
<id>urn:sha1:c2fbe663ec4f991832d67f936d3941f781884156</id>
<content type='text'>
[WHY]
Memory clock switching has great potential for power savings.

[HOW]
The driver code was modified to notify the DMCUB firmware that it should
stretch the vertical blank of frames when a memory clock switch is about
to start so that no blackouts happen on the screen due to unavailability
of the frame buffer.
The driver logic to determine when such firmware assisted strategy can
be initiated is also implemented and consists on checking prerequisites
of the feature.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix inconsistent timestamp type</title>
<updated>2022-04-12T18:19:51Z</updated>
<author>
<name>Angus Wang</name>
<email>Angus.Wang@amd.com</email>
</author>
<published>2022-03-31T13:33:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=19a2e1e36a2b14d7549a6d9584be131f4286f757'/>
<id>urn:sha1:19a2e1e36a2b14d7549a6d9584be131f4286f757</id>
<content type='text'>
[WHY]
An unsigned int timestamp variable is assigned with an unsigned
long long value. Also, the assignment directly converts the
tick value to us without using built-in get elapsed time function.

[HOW]
Cast the assigned value correctly and also use built-in function
to get the timestamp in the unit we want.

v2: squash in 64 bit division fix

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Angus Wang &lt;Angus.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix 64 bit divide in freesync code</title>
<updated>2022-04-11T17:50:35Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-04-07T19:46:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1754cea1763e2bdc6a2153220440fe9aa9e0f2c9'/>
<id>urn:sha1:1754cea1763e2bdc6a2153220440fe9aa9e0f2c9</id>
<content type='text'>
Use div_u64() rather than a a 64 bit divide.

Fixes: 3fe5739db48843 ("drm/amd/display: Add flip interval workaround")
Reviewed-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Angus Wang &lt;Angus.Wang@amd.com&gt;
Cc: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Cc: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Cc: Nathan Chancellor &lt;nathan@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/dc: remove duplicate include</title>
<updated>2022-04-06T14:20:50Z</updated>
<author>
<name>Lv Ruyi</name>
<email>lv.ruyi@zte.com.cn</email>
</author>
<published>2022-04-06T07:28:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8d2aad983de2a332bf8c22798ab6799f06864fed'/>
<id>urn:sha1:8d2aad983de2a332bf8c22798ab6799f06864fed</id>
<content type='text'>
'dm_services.h' included in 'freesync,c' is duplicated, so remove one.

Reported-by: Zeal Robot &lt;zealci@zte.com.cn&gt;
Signed-off-by: Lv Ruyi &lt;lv.ruyi@zte.com.cn&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add flip interval workaround</title>
<updated>2022-04-05T14:29:47Z</updated>
<author>
<name>Angus Wang</name>
<email>Angus.Wang@amd.com</email>
</author>
<published>2022-03-22T19:37:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3fe5739db488434bc0368577615ea7275b0f43a5'/>
<id>urn:sha1:3fe5739db488434bc0368577615ea7275b0f43a5</id>
<content type='text'>
[WHY]
Some games experience low FPS issues when FreeSync is on and VSync is
toggled to half refresh rate.

[HOW]
First create a function to determine workaround conditions, which is
when we detect 2 or more VSync interrupts between flips and a very short
VSync to flip interval. We do the workaround during VSync interrupts and
set the v_total_max and min to nominal. We also cleanup after we exit
the game.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Angus Wang &lt;Angus.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Get ceiling for v_total calc</title>
<updated>2021-10-28T18:26:14Z</updated>
<author>
<name>Guo, Bing</name>
<email>Bing.Guo@amd.com</email>
</author>
<published>2021-10-04T17:13:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=33df94e181f2181e2bd04c3830eb380f2f3ed048'/>
<id>urn:sha1:33df94e181f2181e2bd04c3830eb380f2f3ed048</id>
<content type='text'>
Updating certain variable blanking calculations to use ceiling function.

Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Acked-by: Agustin Gutierrez &lt;agustin.gutierrez@amd.com&gt;
Signed-off-by: Bing Guo &lt;Bing.Guo@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: disable desktop VRR when using older flip model</title>
<updated>2021-05-27T16:24:34Z</updated>
<author>
<name>hvanzyll</name>
<email>hvanzyll@amd.com</email>
</author>
<published>2021-05-09T00:50:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4932d17697f243976286350a272d59a1b7cdb72b'/>
<id>urn:sha1:4932d17697f243976286350a272d59a1b7cdb72b</id>
<content type='text'>
[WHY]
OS uses older flip model which does not work with desktop
VRR causing memory allocations at the wrong IRQ level.

[HOW]
Checks added to flip model to verify model is 2.2 or greater when
doing any of the desktop VRR checks for full updates. This
prevents full updates when VRR changes until a mode change.

Signed-off-by: Harry VanZyllDeJong &lt;hvanzyll@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
