<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/modules/inc, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules/inc?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules/inc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-06-15T01:38:41Z</updated>
<entry>
<title>drm/amd/display: Add vrr_active_variable to dc_stream_update</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Harry VanZyllDeJong</name>
<email>harry.vanzylldejong@amd.com</email>
</author>
<published>2021-05-10T23:30:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebfb15262af3bec6c3cc263ce04164e44eea4b30'/>
<id>urn:sha1:ebfb15262af3bec6c3cc263ce04164e44eea4b30</id>
<content type='text'>
[WHY]
The display driver on some OSes need to track it in order to
perform memory clock switching decisions.

[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry VanZyllDeJong &lt;harry.vanzylldejong@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Firmware assisted MCLK switch and FS</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Felipe Clark</name>
<email>felipe.clark@amd.com</email>
</author>
<published>2021-03-07T18:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c2fbe663ec4f991832d67f936d3941f781884156'/>
<id>urn:sha1:c2fbe663ec4f991832d67f936d3941f781884156</id>
<content type='text'>
[WHY]
Memory clock switching has great potential for power savings.

[HOW]
The driver code was modified to notify the DMCUB firmware that it should
stretch the vertical blank of frames when a memory clock switch is about
to start so that no blackouts happen on the screen due to unavailability
of the frame buffer.
The driver logic to determine when such firmware assisted strategy can
be initiated is also implemented and consists on checking prerequisites
of the feature.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add flip interval workaround</title>
<updated>2022-04-05T14:29:47Z</updated>
<author>
<name>Angus Wang</name>
<email>Angus.Wang@amd.com</email>
</author>
<published>2022-03-22T19:37:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3fe5739db488434bc0368577615ea7275b0f43a5'/>
<id>urn:sha1:3fe5739db488434bc0368577615ea7275b0f43a5</id>
<content type='text'>
[WHY]
Some games experience low FPS issues when FreeSync is on and VSync is
toggled to half refresh rate.

[HOW]
First create a function to determine workaround conditions, which is
when we detect 2 or more VSync interrupts between flips and a very short
VSync to flip interval. We do the workaround during VSync interrupts and
set the v_total_max and min to nominal. We also cleanup after we exit
the game.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Angus Wang &lt;Angus.Wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix HDCP SEND AKI INIT error</title>
<updated>2022-03-25T16:40:26Z</updated>
<author>
<name>Ahmad Othman</name>
<email>ahmad.othman@amd.com</email>
</author>
<published>2022-03-04T16:56:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4268d081619a55019e44bf0a62222d47e1e09470'/>
<id>urn:sha1:4268d081619a55019e44bf0a62222d47e1e09470</id>
<content type='text'>
[why]
HDCP sends AKI INIT error in case of multiple display on dock

[how]
Add new checks and method to handle display adjustment
for multiple display cases

Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Ahmad Othman &lt;ahmad.othman@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update VSC HDR infoPacket on TF change</title>
<updated>2022-01-25T23:00:35Z</updated>
<author>
<name>Reza Amini</name>
<email>Reza.Amini@amd.com</email>
</author>
<published>2022-01-23T18:20:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0c5a0bbb7379625eb2a5b6a931415c008b7a1a16'/>
<id>urn:sha1:0c5a0bbb7379625eb2a5b6a931415c008b7a1a16</id>
<content type='text'>
[why]
OnSetSourceContentAttribute it does not trigger an update for the VSC
with TF change.

[how]
In this call, create a new VSC infoPacket based on the new config, and
allow DisplayTarget decide if an update and pursuant passive flip is
necessary

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Reza Amini &lt;Reza.Amini@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: unhard code link to phy idx mapping in dc link and clean up</title>
<updated>2022-01-07T22:21:20Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2021-12-13T23:29:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=580013b2cef8babc204b7b78ff093140e112b194'/>
<id>urn:sha1:580013b2cef8babc204b7b78ff093140e112b194</id>
<content type='text'>
[why]
1. Current code hard codes link to PHY mapping in dc link level per asic
per revision.
This is not scalable. In long term the mapping will be obatined from
DMUB and store in dc resource.

2. Depending on DCN revision and endpoint type, the definition of
dio_output_idx dio_output_type and phy_idx are not  consistent. We need
to unify the meaning of these hardware indices across different system
configuration.

[how]
1. Temporarly move the hardcoded mapping to dc_resource level, which
should have full awareness of asic specific configuration and add a TODO
comment to move the mapping to DMUB.

2. populate dio_output_idx/phy_idx for all configuration, define
usb4_enabled bit instead of dio_output_type as an external enum.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1</title>
<updated>2021-10-28T18:26:14Z</updated>
<author>
<name>Ahmad Othman</name>
<email>ahmad.Othman@amd.com</email>
</author>
<published>2021-10-06T01:04:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ffd89aa968d9046ab5fb9f7cdb7f8d3c383a15c1'/>
<id>urn:sha1:ffd89aa968d9046ab5fb9f7cdb7f8d3c383a15c1</id>
<content type='text'>
[Why]
Created new fields that matches new B0 structs On DCN31 the mapping of
DIO output to PHY differs from A0 to B0 boards with new PHY C20 &amp; this
new mapping needed to be handled.

[How]
Mapped new structure based on new structs Added logic for mapping over
A0 and B0 boards Hooked all new structs together.

Reviewed-by: Wenjing Liu &lt;Wenjing.Liu@amd.com&gt;
Acked-by: Agustin Gutierrez &lt;agustin.gutierrez@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Ahmad Othman &lt;Ahmad.Othman@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add authentication_complete in hdcp output</title>
<updated>2021-08-09T19:43:33Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2021-07-26T18:59:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0a95fab36a660021c3127476a8df6518fe47a23e'/>
<id>urn:sha1:0a95fab36a660021c3127476a8df6518fe47a23e</id>
<content type='text'>
[why]
DM needs to be notified when hdcp module has completed
authentication attempt.

Reviewed-by: Bhawanpreet Lakha &lt;bhawanpreet.lakha@amd.com&gt;
Reviewed-by: George Shen &lt;George.Shen@amd.com&gt;
Acked-by: Anson Jacob &lt;Anson.Jacob@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove unused functions</title>
<updated>2021-07-28T20:37:17Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2021-07-15T18:55:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7ac851bcd54778337fb500e9c03ae1bd44de4f3d'/>
<id>urn:sha1:7ac851bcd54778337fb500e9c03ae1bd44de4f3d</id>
<content type='text'>
[why]
It has been decided that opm state query support will be dropped.
Therefore link encryption enabled and save current encryption states
won't be used anymore and there are no foreseeable usages in the future.
We will remove these two interfaces for clean up.

Acked-by: Solomon Chiu &lt;solomon.chiu@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add update authentication interface</title>
<updated>2021-07-28T20:37:17Z</updated>
<author>
<name>Wenjing Liu</name>
<email>wenjing.liu@amd.com</email>
</author>
<published>2021-07-14T18:14:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=40ef288f90f962998f272630454d10a409554fb8'/>
<id>urn:sha1:40ef288f90f962998f272630454d10a409554fb8</id>
<content type='text'>
[why]
Previously to toggle authentication, we need to remove and
add the same display back with modified adjustment.
This method will toggle DTM state without actual hardware changes.
This is not per design and would cause potential issues in the long run.

[how]
We are creating a dedicated interface that does the same thing as
remove and add back the display without changing DTM state.

Acked-by: Solomon Chiu &lt;solomon.chiu@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
