<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/amd/display/modules, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/display/modules?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-11T15:33:31Z</updated>
<entry>
<title>drm/amd/display: fix transfer function passed to build_coefficients()</title>
<updated>2022-10-11T15:33:31Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-09-19T16:36:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a895014853ea6df2778533e2a0bb7a0d53f02ec2'/>
<id>urn:sha1:a895014853ea6df2778533e2a0bb7a0d53f02ec2</id>
<content type='text'>
The default argument should be enum TRANSFER_FUNCTION_SRGB rather than
the current boolean value which improperly maps to
TRANSFER_FUNCTION_BT709.

Commit 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
looks to have improperly reverted
commit d02097095916 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709")
replacing the enum value with a boolean value.

Cc: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Cc: Jaehyun Chung &lt;jaehyun.chung@amd.com&gt;
Cc: Zeng Heng &lt;zengheng4@huawei.com&gt;
Fixes: 9b3d76527f6e ("drm/amd/display: Revert adding degamma coefficients")
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Limit user regamma to a valid value</title>
<updated>2022-09-13T18:33:00Z</updated>
<author>
<name>Yao Wang1</name>
<email>Yao.Wang1@amd.com</email>
</author>
<published>2022-08-22T10:30:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=61e4de65b99c616d5e074a9e2a4a1a9f821a964b'/>
<id>urn:sha1:61e4de65b99c616d5e074a9e2a4a1a9f821a964b</id>
<content type='text'>
[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x &gt; 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Krunoslav Kovac &lt;Krunoslav.Kovac@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Pavle Kotarac &lt;Pavle.Kotarac@amd.com&gt;
Signed-off-by: Yao Wang1 &lt;Yao.Wang1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix HDMI VSIF V3 incorrect issue</title>
<updated>2022-08-10T19:12:13Z</updated>
<author>
<name>Leo Ma</name>
<email>hanghong.ma@amd.com</email>
</author>
<published>2022-07-22T17:42:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0591183699fceeafb4c4141072d47775de83ecfb'/>
<id>urn:sha1:0591183699fceeafb4c4141072d47775de83ecfb</id>
<content type='text'>
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Disable PSRSU when DSC enabled on the specific sink</title>
<updated>2022-07-12T20:50:29Z</updated>
<author>
<name>Robin Chen</name>
<email>po-tchen@amd.com</email>
</author>
<published>2022-06-20T16:18:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e2facd575fdf13b718f6c833ed546467a3e6e3ba'/>
<id>urn:sha1:e2facd575fdf13b718f6c833ed546467a3e6e3ba</id>
<content type='text'>
[Why]
Some specific sink is not able to support PSRSU when DSC is turned on.
For this case, fall-back to use PSR1.

Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Acked-by: Solomon Chiu &lt;solomon.chiu@amd.com&gt;
Signed-off-by: Robin Chen &lt;po-tchen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move all linux includes into OS types</title>
<updated>2022-07-05T20:16:49Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2019-11-22T15:12:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09de5cd2c170b19e04e37439a712da52a0535015'/>
<id>urn:sha1:09de5cd2c170b19e04e37439a712da52a0535015</id>
<content type='text'>
Move all linux includes into OS types.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add vrr_active_variable to dc_stream_update</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Harry VanZyllDeJong</name>
<email>harry.vanzylldejong@amd.com</email>
</author>
<published>2021-05-10T23:30:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebfb15262af3bec6c3cc263ce04164e44eea4b30'/>
<id>urn:sha1:ebfb15262af3bec6c3cc263ce04164e44eea4b30</id>
<content type='text'>
[WHY]
The display driver on some OSes need to track it in order to
perform memory clock switching decisions.

[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Harry VanZyllDeJong &lt;harry.vanzylldejong@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Firmware assisted MCLK switch and FS</title>
<updated>2022-06-15T01:38:41Z</updated>
<author>
<name>Felipe Clark</name>
<email>felipe.clark@amd.com</email>
</author>
<published>2021-03-07T18:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c2fbe663ec4f991832d67f936d3941f781884156'/>
<id>urn:sha1:c2fbe663ec4f991832d67f936d3941f781884156</id>
<content type='text'>
[WHY]
Memory clock switching has great potential for power savings.

[HOW]
The driver code was modified to notify the DMCUB firmware that it should
stretch the vertical blank of frames when a memory clock switch is about
to start so that no blackouts happen on the screen due to unavailability
of the frame buffer.
The driver logic to determine when such firmware assisted strategy can
be initiated is also implemented and consists on checking prerequisites
of the feature.

Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Felipe Clark &lt;felipe.clark@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: update topology_update_input_v3 struct</title>
<updated>2022-06-15T01:38:40Z</updated>
<author>
<name>Qingqing Zhuo</name>
<email>qingqing.zhuo@amd.com</email>
</author>
<published>2022-06-03T18:44:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f51d22b0d04aa33e94d663fb63aa61e4da168523'/>
<id>urn:sha1:f51d22b0d04aa33e94d663fb63aa61e4da168523</id>
<content type='text'>
[Why]
DIO parameters were missing in topology_update_intput_v3 struct.

[How]
Add DIO parameters in v3 struct and update in functions perspectively.

Reviewed-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix monitor flash issue</title>
<updated>2022-06-15T01:38:40Z</updated>
<author>
<name>Shah Dharati</name>
<email>dharshah@amd.com</email>
</author>
<published>2022-05-31T13:58:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5'/>
<id>urn:sha1:b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5</id>
<content type='text'>
[Why &amp; How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
fixes the issue, so it is implemented as monitor specific patch.

Co-authored-by: Shah Dharati &lt;dharshah@amd.com&gt;
Reviewed-by: Hansen Dsouza &lt;Hansen.Dsouza@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Shah Dharati &lt;dharshah@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add shared helpers to update psr config fields to power module</title>
<updated>2022-06-06T18:42:33Z</updated>
<author>
<name>David Zhang</name>
<email>dingchen.zhang@amd.com</email>
</author>
<published>2022-04-25T22:08:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=65e7a17499e15771339d85eaa1ba686ad2fe342c'/>
<id>urn:sha1:65e7a17499e15771339d85eaa1ba686ad2fe342c</id>
<content type='text'>
[why]
Currently the amdgpu DM psr configuration parameters are hardcoded
before feeding into the DC helper to setup PSR. We would define a
helper which is to calculate parts of the psr config fields to
avoid hard-coding.

[how]
To make helper shareable, declare and define the helper in the
module_helper, to set/update below fields:
- psr remote buffer setup time
- sdp tx line number deadline
- line time in us
- su_y_granularity
- su_granularity_required
- psr_frame_capture_indication_req
- psr_exit_link_training_required

add another helper to check given the stream context, if there is
only one stream and the output is eDP panel connected.

changes in v2:
------------------
- add detailed comment for how psr setup time is calculated as per
  eDP 1.5 spec

Cc: Chandan Vurdigerenataraj &lt;chandan.vurdigerenataraj@amd.com&gt;

Signed-off-by: David Zhang &lt;dingchen.zhang@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
