linux-dev/drivers/gpu/drm/amd/include/asic_reg/dpcs, branch masterLinux kernel development work - see feature brancheshttps://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/include/asic_reg/dpcs?h=master2022-07-14T00:57:04Zdrm/amdgpu: Add reg headers for DCN3142022-07-14T00:57:04ZRoman Liroman.li@amd.com2022-06-28T19:06:23Zurn:sha1:8955ff11f56e1596e9f80ff6fa8c48e53047654c
Register headers for the following IPs:
- DCN 3.1.4
- DPCS 3.1.4
v2:(squash) clean up (Alex)
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: fix file permissions on some files2022-07-13T15:25:18ZAlex Deucheralexander.deucher@amd.com2022-07-12T13:22:23Zurn:sha1:0a94608f0f7de9b1135ffea3546afe68eafef57f
Drop execute.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/include: add DCN 3.1.5 registers2022-02-18T19:07:00ZQingqing Zhuoqingqing.zhuo@amd.com2022-01-27T02:52:11Zurn:sha1:5b723b12301272ed3c6c99c4ad8b43a520f880ea
Add DCN 3.1.5 and DPCS 4.2.2 register headers.
Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/include: Add register headers for DCN 3.1.62022-02-17T20:44:45ZLeo Lisunpeng.li@amd.com2022-01-27T17:06:53Zurn:sha1:64b14a184e83eb62ea0615e31a409956049d40e7
Add register headers for the following IPs:
- DCN 3.1.6
- DPCS 4.2.3
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcs2022-02-07T23:03:50ZAlex Deucheralexander.deucher@amd.com2022-02-03T18:04:46Zurn:sha1:4a5dc6c73dbec54648fe01af2f1818dc3ae90d5d
To align with other headers.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcs2022-02-07T23:03:50ZAlex Deucheralexander.deucher@amd.com2022-02-03T17:52:21Zurn:sha1:68550cbc6129159b7a6434796b721e8b66ee12f6
To align with other headers.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add cyan_skillfish asic header files2021-09-29T21:30:00ZZhan Liuzhan.liu@amd.com2021-09-25T07:51:08Zurn:sha1:0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3
This patch is to add cyan_skillfish asic header files.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix B0 USB-C DP Alt mode2021-09-23T19:17:30ZLiu, ZhanZhan.Liu@amd.com2021-09-09T17:26:37Zurn:sha1:bdd1a21b52557ea8f61d0a5dc2f77151b576eb70
[Why]
Starting from B0, along with RDPCSTX, RDPCSPIPE registers are also used.
[How]
Make sure RDPCSPIPE registers are programmed correctly.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Zhan Liu <Zhan.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add yellow carp asic header files (v3)2021-06-04T20:03:05ZAaron Liuaaron.liu@amd.com2020-11-04T05:00:05Zurn:sha1:02680c23d7b3febe45ea3d4f9818c2b2dc89020a
This patch is to add yellow carp asic header files.
v2: squash in updates (Alex)
v3: squash in DCN updates (Alex)
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add dpcs20 registers2019-12-18T21:09:06ZRoman LiRoman.Li@amd.com2019-12-02T21:26:42Zurn:sha1:d3c431ee0f7726f7053367b345341f5d709e8fb0
add reg headers to dpcs includes
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>