Linux kernel development work - see feature branches https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/include/asic_reg/mmhub?h=master 2022-09-29T13:41:43Z 2022-09-29T13:41:43Z Tom St Denis tom.stdenis@amd.com 2022-09-23T12:55:50Z urn:sha1:82806c25d5e9d927ecb68c0c3679dd41187c9af6 These are used by umr to sort the hive nodes since the kernel initializes the nodes in order of bus enumeration not XGMI hive enumeration. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-06-03T20:44:15Z Huang Rui ray.huang@amd.com 2022-05-12T08:03:34Z urn:sha1:d57716702deac8e0ec440739eb4cd6eb0872ddd4 Add mmhub v3_0_1 headers, because there are many differeces with v3_0_0. v2: squash in updates (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-05-05T20:51:45Z Hawking Zhang Hawking.Zhang@amd.com 2022-02-06T16:34:00Z urn:sha1:fd1e77d915bcbd65a5ee667b94b73628f77c818e Add mmhub v3_0_2 register offset and shift masks v2: update to latest headers Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2022-05-04T13:57:16Z Hawking Zhang Hawking.Zhang@amd.com 2021-11-18T05:42:36Z urn:sha1:9f99d9830554a13dc9f5e47dbaddfae36cbf416e Add mmhub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2021-03-10T05:01:00Z Hawking Zhang Hawking.Zhang@amd.com 2020-12-07T12:17:45Z urn:sha1:b9dd2add842c0e4d50cbafe135356c2431fdbc8b v1: Add mmhub v1_7 register offset and shift masks in header files (Hawking) v2: Clean up mmhub v1_7 registers (Alex) v3: Update registers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-10-05T19:14:02Z Huang Rui ray.huang@amd.com 2019-10-20T00:39:44Z urn:sha1:a5b2c10c05ef12739be9907cc35acd33dff09020 This patch is to add vangogh asic header files. v2: squash in updates Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-01-22T21:35:42Z Dennis Li Dennis.Li@amd.com 2020-01-13T08:15:38Z urn:sha1:f519cd13c23e8c884011295b205c1463babbf416 Add mask & shift definition of MAM_D(0~3)MEM for all mmhub ranges. Signed-off-by: Dennis Li <Dennis.Li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-11-22T19:26:46Z Dennis Li Dennis.Li@amd.com 2019-11-19T08:02:28Z urn:sha1:8781e5df119fbce754bf027c691208f677dc07c8 Add codes to print the detail EDC info for the subblock of mmhub v2: Move the EDC_CNT registers' defintion from mmhub_9_4 header files to mmhub_1_0 ones. Add mmhub_v1_0_ prefix for the local static variable and function. v3: squash in DC fix Signed-off-by: Dennis Li <dennis.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-08-15T15:51:50Z Tao Zhou tao.zhou1@amd.com 2019-08-13T07:46:03Z urn:sha1:d6e0cbb152b35833a26772c86b338d8297ce609d get mmhub ea ras error count by accessing EDC_CNT register Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-07-18T19:18:01Z Le Ma le.ma@amd.com 2018-08-29T08:49:19Z urn:sha1:0e96cf7f676972b1154c4c2b68e878266a405a84 mmhub is the GPU memory hub used by SDMA and VCN. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>