Linux kernel development work - see feature branches https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/amd/include/asic_reg/oss?h=master 2022-05-04T13:52:56Z 2022-05-04T13:52:56Z Hawking Zhang Hawking.Zhang@amd.com 2021-12-30T11:21:43Z urn:sha1:d71093aa15f018ec005a31a131068f46653900ac Add osssys v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2020-12-23T20:05:20Z Hawking Zhang Hawking.Zhang@amd.com 2020-12-08T09:22:30Z urn:sha1:502173ac2386c9e417ccf75e5e84241d52f41702 v1: add osssys v4_2 register offset and shift masks header files. vega20 and arcturus will refer to these ip headers. (Hawking) v2: clean up osssys v4_2 registers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> 2019-10-03T14:11:04Z Kenneth Feng kenneth.feng@amd.com 2019-09-25T05:41:35Z urn:sha1:227f7d58d707fa6d931a1e16d29eb3e1c41ad67d enable/disable IH clock gating on soc15 projects. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-08-30T20:37:17Z Aaron Liu aaron.liu@amd.com 2018-12-14T03:16:36Z urn:sha1:75966255881127f4a2c0ab7e18d9224672bdeddb In Renoir's emulator, those chicken bits need to be programmed. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-06-20T20:54:42Z Hawking Zhang Hawking.Zhang@amd.com 2019-03-03T03:30:47Z urn:sha1:3d220cc3bde54df9fdfbe40458e580971723b767 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-03-21T19:23:01Z Feifei Xu Feifei.Xu@amd.com 2017-10-16T10:09:14Z urn:sha1:133f97945f679ae0040a50f5933ef9a6563cb30b Add ip header files for IPs with a delta for vg12: GC, MMHUB, OSS Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-By: Ken Wang <ken.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2017-12-06T17:48:22Z Feifei Xu Feifei.Xu@amd.com 2017-11-24T02:46:24Z urn:sha1:8af7454e7c6b20cd8d130f08c443d1e76033d0ca Cleanup asic_reg/vega10/OSSSYS folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-11-11T15:21:08Z Tom St Denis tom.stdenis@amd.com 2016-11-07T19:06:01Z urn:sha1:5e2e2119955a9f18beccd6603bdd255dad18eb15 Add missing gca MMIO registers and defines necessary for the next patch which re-works a lot of gfx v6 to use the new SI headers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-11-11T15:21:07Z Tom St Denis tom.stdenis@amd.com 2016-10-26T15:58:25Z urn:sha1:de2bdb3dcf9228030b4e0a2d83f3d6b6bedc6c33 This introduces the SI registers in the amdgpu driver style. v2: squash duplicates fix Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2015-06-04T01:03:02Z Alex Deucher alexander.deucher@amd.com 2015-04-16T19:27:02Z urn:sha1:a1ef4a8aa1498156da51a8b46a9a2477aac0fb01 These are register headers for the OSS (OS Services) block on the GPU. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>