<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/etnaviv/etnaviv_gpu.h, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/etnaviv/etnaviv_gpu.h?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/etnaviv/etnaviv_gpu.h?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-12-23T19:21:33Z</updated>
<entry>
<title>drm/etnaviv: consider completed fence seqno in hang check</title>
<updated>2021-12-23T19:21:33Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2021-12-22T00:17:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=cdd156955f946beaa5f3a00d8ccf90e5a197becc'/>
<id>urn:sha1:cdd156955f946beaa5f3a00d8ccf90e5a197becc</id>
<content type='text'>
Some GPU heavy test programs manage to trigger the hangcheck quite often.
If there are no other GPU users in the system and the test program
exhibits a very regular structure in the commandstreams that are being
submitted, we can end up with two distinct submits managing to trigger
the hangcheck with the FE in a very similar address range. This leads
the hangcheck to believe that the GPU is stuck, while in reality the GPU
is already busy working on a different job. To avoid those spurious
GPU resets, also remember and consider the last completed fence seqno
in the hang check.

Reported-by: Joerg Albert &lt;joerg.albert@iav.de&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: stop abusing mmu_context as FE running marker</title>
<updated>2021-09-16T08:35:15Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2021-08-20T20:18:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=23e0f5a57d0ecec86e1fc82194acd94aede21a46'/>
<id>urn:sha1:23e0f5a57d0ecec86e1fc82194acd94aede21a46</id>
<content type='text'>
While the DMA frontend can only be active when the MMU context is set, the
reverse isn't necessarily true, as the frontend can be stopped while the
MMU state is kept. Stop treating mmu_context being set as a indication that
the frontend is running and instead add a explicit property.

Cc: stable@vger.kernel.org # 5.4
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Michael Walle &lt;michael@walle.cc&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: determine product, customer and eco id</title>
<updated>2020-02-26T15:20:04Z</updated>
<author>
<name>Christian Gmeiner</name>
<email>christian.gmeiner@gmail.com</email>
</author>
<published>2020-01-06T15:16:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=815e45bbd4d3b00ddb2af017fbdab25110ed13a4'/>
<id>urn:sha1:815e45bbd4d3b00ddb2af017fbdab25110ed13a4</id>
<content type='text'>
They will be used for extended HWDB support.

Signed-off-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: avoid deprecated timespec</title>
<updated>2019-12-18T17:07:32Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2017-11-06T12:28:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=38c4a4cf02513a7904b9db0a668b7e50145ea696'/>
<id>urn:sha1:38c4a4cf02513a7904b9db0a668b7e50145ea696</id>
<content type='text'>
struct timespec is being removed from the kernel because it often leads
to code that is not y2038-safe.

In the etnaviv driver, monotonic timestamps are used, which do not suffer
from overflow, but the usage of timespec here gets in the way of removing
the interface completely.

Pass down the user-supplied 64-bit value here rather than converting
it to an intermediate timespec to avoid the conversion.

The conversion is transparent for all regular CLOCK_MONOTONIC values,
but is a small change in behavior for excessively large values: the
existing code would treat e.g. tv_sec=0x100000000 the same as tv_sec=0
and not block, while the new code it would block for up to 2^31
seconds. The new behavior is more logical here, but if it causes problems,
the truncation can be put back.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: implement per-process address spaces on MMUv2</title>
<updated>2019-08-15T09:44:27Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=17e4660ae3d7e14120f0b355d3d1995cd10a3e43'/>
<id>urn:sha1:17e4660ae3d7e14120f0b355d3d1995cd10a3e43</id>
<content type='text'>
This builds on top of the MMU contexts introduced earlier. Instead of having
one context per GPU core, each GPU client receives its own context.

On MMUv1 this still means a single shared pagetable set is used by all
clients, but on MMUv2 there is now a distinct set of pagetables for each
client. As the command fetch is also translated via the MMU on MMUv2 the
kernel command ringbuffer is mapped into each of the client pagetables.

As the MMU context switch is a bit of a heavy operation, due to the needed
cache and TLB flushing, this patch implements a lazy way of switching the
MMU context. The kernel does not have its own MMU context, but reuses the
last client context for all of its operations. This has some visible impact,
as the GPU can now only be started once a client has submitted some work and
we got the client MMU context assigned. Also the MMU context has a different
lifetime than the general client context, as the GPU might still execute the
kernel command buffer in the context of a client even after the client has
completed all GPU work and has been terminated. Only when the GPU is runtime
suspended or switches to another clients MMU context is the old context
freed up.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: rework MMU handling</title>
<updated>2019-08-15T08:56:45Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=27b67278e007b5475bc14918794bf73cf297a026'/>
<id>urn:sha1:27b67278e007b5475bc14918794bf73cf297a026</id>
<content type='text'>
This reworks the MMU handling to make it possible to have multiple MMU contexts.
A context is basically one instance of GPU page tables. Currently we have one
set of page tables per GPU, which isn't all that clever, as it has the
following two consequences:

1. All GPU clients (aka processes) are sharing the same pagetables, which means
there is no isolation between clients, but only between GPU assigned memory
spaces and the rest of the system. Better than nothing, but also not great.

2. Clients operating on the same set of buffers with different etnaviv GPU
cores, e.g. a workload using both the 2D and 3D GPU, need to map the used
buffers into the pagetable sets of each used GPU.

This patch reworks all the MMU handling to introduce the abstraction of the
MMU context. A context can be shared across different GPU cores, as long as
they have compatible MMU implementations, which is the case for all systems
with Vivante GPUs seen in the wild.

As MMUv1 is not able to change pagetables on the fly, without a
"stop the world" operation, which stops GPU, changes pagetables via CPU
interaction, restarts GPU, the implementation introduces a shared context on
MMUv1, which is returned whenever there is a request for a new context.

This patch assigns a MMU context to each GPU, so on MMUv2 systems there is
still one set of pagetables per GPU, but due to the shared context MMUv1
systems see a change in behavior as now a single pagetable set is used
across all GPU cores.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: replace MMU flush marker with flush sequence</title>
<updated>2019-08-15T08:56:03Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4900dda90af2cb13bc1d4c12ce94b98acc8fe64e'/>
<id>urn:sha1:4900dda90af2cb13bc1d4c12ce94b98acc8fe64e</id>
<content type='text'>
If a MMU is shared between multiple GPUs, all of them need to flush their
TLBs, so a single marker that gets reset on the first flush won't do.
Replace the flush marker with a sequence number, so that it's possible to
check if the TLB is in sync with the current page table state for each GPU.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: share a single cmdbuf suballoc region across all GPUs</title>
<updated>2019-08-15T08:55:30Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bffe5db81ae63ec75f5e09d1c97de42c37cb181e'/>
<id>urn:sha1:bffe5db81ae63ec75f5e09d1c97de42c37cb181e</id>
<content type='text'>
There is no need for each GPU to have it's own cmdbuf suballocation
region. Only allocate a single one for the the etnaviv virtual device
and share it across all GPUs.

As the suballoc space is now potentially shared by more hardware jobs
running in parallel, double its size to 512KB to avoid contention.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: split out cmdbuf mapping into address space</title>
<updated>2019-08-15T08:55:03Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=db82a0435b8be32d544bbed91c43c2f21b5f4ea7'/>
<id>urn:sha1:db82a0435b8be32d544bbed91c43c2f21b5f4ea7</id>
<content type='text'>
This allows to decouple the cmdbuf suballocator create and mapping
the region into the GPU address space. Allowing multiple AS to share
a single cmdbuf suballoc.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
<entry>
<title>drm/etnaviv: simplify unbind checks</title>
<updated>2019-08-15T08:54:07Z</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2019-07-05T17:17:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=db41fe7d2f75c946a0b138aa789ca7cf6cd8afc1'/>
<id>urn:sha1:db41fe7d2f75c946a0b138aa789ca7cf6cd8afc1</id>
<content type='text'>
Remember if the GPU has been sucessfully initialized. Only in that case
do we need to clean up various structures in the unbind path. If the
GPU hasn't been sucessfully initialized all the cleanups should happen
in the failure paths of the init function.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
</content>
</entry>
</feed>
