<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/i915/gem/selftests, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/i915/gem/selftests?h=master</id>
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<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-15T12:38:13Z</updated>
<entry>
<title>Merge tag 'drm-intel-next-2022-08-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-next</title>
<updated>2022-09-15T12:38:13Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2022-09-15T12:38:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d1e2d6b78ffc0317b41e1465b47e325e2765e5e0'/>
<id>urn:sha1:d1e2d6b78ffc0317b41e1465b47e325e2765e5e0</id>
<content type='text'>
drm/i915 feature pull for v6.1:

Features and functionality:
- Early Meteorlake (MTL) enabling (José, Radhakrishna, Clint, Imre, Vandita, Ville, Jani)
- Support more HDMI pixel clock frequencies on DG2 (Clint)
- Sanity check PCI BARs (Piotr Piórkowski)
- Enable DC5 on DG2 (Anusha)
- DG2 DMC firmware version bump to v2.07 (Madhumitha)
- New ADL-S PCI ID (José)

Refactoring and cleanups:
- Add display sub-struct to struct drm_i915_private (Jani)
- Add initial runtime info to device info (Jani)
- Split out HDCP and backlight registers to separate files (Jani)

Fixes:
- Skip wm/ddb readout for disabled pipes (Ville)
- HDMI port timing quirk for GLK ECS Liva Q2 (Diego Santa Cruz)
- Fix bw init null pointer dereference (Łukasz Bartosik)
- Disable PPS power hook for DP AUX backlight (Jouni)
- Avoid warnings on registering multiple backlight devices (Arun)
- Fix dual-link DSI backlight and CABC ports for display 11+ (Jani)
- Fix Type-C PHY ownership programming in HDMI legacy mode (Imre)
- Fix unclaimed register access while loading PIPEDMC-C/D (Imre)
- Bump up CDCLK for DG2 (Stan)
- Prune modes that require HDMI 2.1 FRL (Ankit)
- Disable FBC when PSR1 is enabled in display 12-13 (Matt)
- Fix TGL+ HDMI transcoder clock and DDI BUF disable order (Imre)
- Disable PSR before disable pipe (José)
- Disable DMC handlers during firmware loading/disabling on display 12+ (Imre)
- Disable clock gating for PIPEDMC-A/B as a workaround (Imre)

Merges:
- Two drm-next backmerges (Rodrigo, Jani)

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/87k06rfaku.fsf@intel.com
</content>
</entry>
<entry>
<title>drm/i915: Rename ggtt_view as gtt_view</title>
<updated>2022-09-08T09:24:17Z</updated>
<author>
<name>Niranjana Vishwanathapura</name>
<email>niranjana.vishwanathapura@intel.com</email>
</author>
<published>2022-09-01T18:38:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3bb6a44251b4d066d73faf43dc17bad05963ae16'/>
<id>urn:sha1:3bb6a44251b4d066d73faf43dc17bad05963ae16</id>
<content type='text'>
So far, different views (normal, partial, rotated and remapped)
into the same object are only supported for GGTT mappings.
But with the upcoming VM_BIND feature, PPGTT will also use the
partial view mapping. Hence rename ggtt_view to more generic
gtt_view.

Signed-off-by: Niranjana Vishwanathapura &lt;niranjana.vishwanathapura@intel.com&gt;
Acked-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220901183854.3446-1-niranjana.vishwanathapura@intel.com
</content>
</entry>
<entry>
<title>drm/i915: split gem quirks from display quirks</title>
<updated>2022-08-29T11:31:53Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2022-08-24T13:15:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=95086cb969b2cb8abe4984457f219ec70d24052e'/>
<id>urn:sha1:95086cb969b2cb8abe4984457f219ec70d24052e</id>
<content type='text'>
The lone gem quirk is an outlier, not even handled by the common quirk
code. Split it to a separate gem_quirks member.

Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/fe9c0cb1e49da0ddc31d24c996af5fd09bce3042.1661346845.git.jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915: move ppgtt_type and ppgtt_size to runtime info</title>
<updated>2022-08-24T08:45:26Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2022-08-19T12:02:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=268c67e5bd8611f0835839957e77f92bc589b7d0'/>
<id>urn:sha1:268c67e5bd8611f0835839957e77f92bc589b7d0</id>
<content type='text'>
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Maarten Lankhort &lt;maarten.lankhorst@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/9a9b94cb79a00229da5a564a16ea750a6d392ab6.1660910433.git.jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915: move page_sizes to runtime info</title>
<updated>2022-08-24T08:45:26Z</updated>
<author>
<name>Jani Nikula</name>
<email>jani.nikula@intel.com</email>
</author>
<published>2022-08-19T12:02:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9d0bad177af9fd31ea14e580a34e34d02edd26a0'/>
<id>urn:sha1:9d0bad177af9fd31ea14e580a34e34d02edd26a0</id>
<content type='text'>
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Maarten Lankhort &lt;maarten.lankhorst@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/f6825dd97d2ba63aa395c30131c4b9e6ef32b0c8.1660910433.git.jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915/selftests: Use correct selfest calls for live tests</title>
<updated>2022-08-18T22:23:44Z</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2022-08-17T02:05:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=61faec5fa66cbd1afcd5074f168f09529f8119bf'/>
<id>urn:sha1:61faec5fa66cbd1afcd5074f168f09529f8119bf</id>
<content type='text'>
This will help in an upcoming patch where the live selftest wrappers
are extended to do more.

Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Signed-off-by: Alan Previn &lt;alan.previn.teres.alexis@intel.com&gt;
Reviewed-by: John Harrison &lt;john.c.harrison@Intel.com&gt;
Signed-off-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220817020511.2180747-2-alan.previn.teres.alexis@intel.com
</content>
</entry>
<entry>
<title>drm/i915/selftests: Grab the runtime pm in shrink_thp</title>
<updated>2022-07-07T08:16:43Z</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2022-07-06T15:47:38Z</published>
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<id>urn:sha1:027c38b4121e7d9ae43b2fa21b35582d1aef2a05</id>
<content type='text'>
Since we are not holding a wakeref, shrinking a bound object is not
guaranteed.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6370
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220706154738.235204-1-matthew.auld@intel.com
</content>
</entry>
<entry>
<title>drm/i915/ttm: handle blitter failure on DG2</title>
<updated>2022-07-01T07:30:00Z</updated>
<author>
<name>Matthew Auld</name>
<email>matthew.auld@intel.com</email>
</author>
<published>2022-06-29T17:43:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bfe53be268afd2248d1e28b4520361693c1c0fce'/>
<id>urn:sha1:bfe53be268afd2248d1e28b4520361693c1c0fce</id>
<content type='text'>
If the move or clear operation somehow fails, and the memory underneath
is not cleared, like when moving to lmem, then we currently fallback to
memcpy or memset. However with small-BAR systems this fallback might no
longer be possible. For now we use the set_wedged sledgehammer if we
ever encounter such a scenario, and mark the object as borked to plug
any holes where access to the memory underneath can happen. Add some
basic selftests to exercise this.

v2:
  - In the selftests make sure we grab the runtime pm around the reset.
    Also make sure we grab the reset lock before checking if the device
    is wedged, since the wedge might still be in-progress and hence the
    bit might not be set yet.
  - Don't wedge or put the object into an unknown state, if the request
    construction fails (or similar). Just returning an error and
    skipping the fallback should be safe here.
  - Make sure we wedge each gt. (Thomas)
  - Peek at the unknown_state in io_reserve, that way we don't have to
    export or hand roll the fault_wait_for_idle. (Thomas)
  - Add the missing read-side barriers for the unknown_state. (Thomas)
  - Some kernel-doc fixes. (Thomas)
v3:
  - Tweak the ordering of the set_wedged, also add FIXME.

Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Lionel Landwerlin &lt;lionel.g.landwerlin@intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@linux.intel.com&gt;
Cc: Jon Bloomfield &lt;jon.bloomfield@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Jordan Justen &lt;jordan.l.justen@intel.com&gt;
Cc: Kenneth Graunke &lt;kenneth@whitecape.org&gt;
Cc: Akeem G Abodunrin &lt;akeem.g.abodunrin@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220629174350.384910-11-matthew.auld@intel.com
</content>
</entry>
<entry>
<title>drm/i915/selftests: ensure we reserve a fence slot</title>
<updated>2022-07-01T07:30:00Z</updated>
<author>
<name>Matthew Auld</name>
<email>matthew.auld@intel.com</email>
</author>
<published>2022-06-29T17:43:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=11f01dcf3b32d01982d99df4492feef4332cf0b3'/>
<id>urn:sha1:11f01dcf3b32d01982d99df4492feef4332cf0b3</id>
<content type='text'>
We should always be explicit and allocate a fence slot before adding a
new fence.

Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Lionel Landwerlin &lt;lionel.g.landwerlin@intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@linux.intel.com&gt;
Cc: Jon Bloomfield &lt;jon.bloomfield@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Jordan Justen &lt;jordan.l.justen@intel.com&gt;
Cc: Kenneth Graunke &lt;kenneth@whitecape.org&gt;
Cc: Akeem G Abodunrin &lt;akeem.g.abodunrin@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220629174350.384910-10-matthew.auld@intel.com
</content>
</entry>
<entry>
<title>drm/i915/selftests: skip the mman tests for stolen</title>
<updated>2022-07-01T07:30:00Z</updated>
<author>
<name>Matthew Auld</name>
<email>matthew.auld@intel.com</email>
</author>
<published>2022-06-29T17:43:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=938d2fd17d173d0489b1bc96b87a1dd93954dc28'/>
<id>urn:sha1:938d2fd17d173d0489b1bc96b87a1dd93954dc28</id>
<content type='text'>
It's not supported, and just skips later anyway. With small-BAR things
get more complicated since all of stolen is likely not even CPU
accessible, hence not passing I915_BO_ALLOC_GPU_ONLY just results in the
object create failing.

Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Cc: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Cc: Lionel Landwerlin &lt;lionel.g.landwerlin@intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@linux.intel.com&gt;
Cc: Jon Bloomfield &lt;jon.bloomfield@intel.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Jordan Justen &lt;jordan.l.justen@intel.com&gt;
Cc: Kenneth Graunke &lt;kenneth@whitecape.org&gt;
Cc: Akeem G Abodunrin &lt;akeem.g.abodunrin@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220629174350.384910-9-matthew.auld@intel.com
</content>
</entry>
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