Linux kernel development work - see feature branches https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/msm/hdmi/hdmi.xml.h?h=linus%2Fmaster 2022-03-04T19:50:41Z 2022-03-04T19:50:41Z Rob Clark robdclark@chromium.org 2022-03-04T00:52:14Z urn:sha1:57cfe41c5f50aaad92942ff9947c6cee54b9d314 Update headers from mesa commit: commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef Author: Rob Clark <robclark@freedesktop.org> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 freedreno/registers: Add a couple regs we need for kernel Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221> Signed-off-by: Rob Clark <robdclark@chromium.org> [for display bits:] Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com 2021-06-23T14:33:54Z Rob Clark robdclark@chromium.org 2021-05-30T22:44:23Z urn:sha1:cc4c26d4ae4e458669d46ff69f16ac0c74f7cd49 Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark <robdclark@chromium.org> 2020-07-31T13:46:16Z Rob Clark robdclark@chromium.org 2020-07-07T20:34:59Z urn:sha1:c28c82e9db8584b15ae3754dfd80385949938a8b We haven't sync'd for a while.. pull in updates to get definitions for some fields in pkt7 payloads. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> 2018-08-10T22:49:18Z Rob Clark robdclark@gmail.com 2018-08-06T18:57:14Z urn:sha1:2d756322533322650f4476265ba413498e998b56 Resync generated headers to pull in a6xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com> 2017-06-16T15:16:07Z Rob Clark robdclark@gmail.com 2017-06-16T12:57:18Z urn:sha1:52260ae4c461538a4f104d463a55dfc13c3d8543 Signed-off-by: Rob Clark <robdclark@gmail.com> 2016-11-28T20:14:10Z Rob Clark robdclark@gmail.com 2016-11-07T19:53:49Z urn:sha1:a26ae754b0ac086151b84a2e8db10b3e98096f2d Pull in a5xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com> 2016-03-03T16:55:27Z Rob Clark robdclark@gmail.com 2016-02-20T18:37:58Z urn:sha1:a2272e48eef02869dc3fa031720f36dd4cb05e4f Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com> 2016-02-29T14:48:31Z Archit Taneja architt@codeaurora.org 2016-02-25T05:52:43Z urn:sha1:e9a2ce1349d4e3698676d7903aa448b2422a3629 Adds HDMI 8996 PHY offsets. The offsets are divided into 3 parts: - Core HDMI PHY registers - HDMI PLL registers (part of QSERDES block) - HDMI TX lane registers (part of QSERDES block) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2016-02-29T14:48:31Z Archit Taneja architt@codeaurora.org 2016-02-25T05:52:42Z urn:sha1:568be320f7543a366609b3b8e9b7a2346fa00e49 - Create separate domains for 8960 PHY and PLL - Create separate domains for 8x60 PHY Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> 2015-10-22T19:39:44Z Rob Clark robdclark@gmail.com 2015-10-22T16:36:57Z urn:sha1:8217e97ab9888651f4a5b24c682047457965349a Signed-off-by: Rob Clark <robdclark@gmail.com>