<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/gpu/drm/nouveau/nvkm/subdev/fault, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/nouveau/nvkm/subdev/fault?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/gpu/drm/nouveau/nvkm/subdev/fault?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-02-11T01:49:54Z</updated>
<entry>
<title>drm/nouveau/mc: use split type+inst in interrupt masking API</title>
<updated>2021-02-11T01:49:54Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2021-02-06T00:47:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a35047ba771461c3acef174445db35d3613d3c41'/>
<id>urn:sha1:a35047ba771461c3acef174445db35d3613d3c41</id>
<content type='text'>
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
Reviewed-by: Lyude Paul &lt;lyude@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault: switch to instanced constructor</title>
<updated>2021-02-11T01:49:52Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2020-12-04T01:07:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=77689f1b6b0a99179b764035b186d30ee8ef938f'/>
<id>urn:sha1:77689f1b6b0a99179b764035b186d30ee8ef938f</id>
<content type='text'>
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
Reviewed-by: Lyude Paul &lt;lyude@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/mc/tu102: Fix MMU fault interrupts on Turing</title>
<updated>2021-01-29T06:49:12Z</updated>
<author>
<name>Alistair Popple</name>
<email>apopple@nvidia.com</email>
</author>
<published>2020-10-30T02:36:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c3cc12eaf511a8a47ade42f521534255ef8ffd47'/>
<id>urn:sha1:c3cc12eaf511a8a47ade42f521534255ef8ffd47</id>
<content type='text'>
Turing reports MMU fault interrupts via new top level interrupt
registers. The old PMC MMU interrupt vector is not used by the HW. This
means we can remap the new top-level MMU interrupt to the exisiting PMC
MMU bit which simplifies the implementation until all interrupts are
moved over to using the new top level registers.

Signed-off-by: Alistair Popple &lt;apopple@nvidia.com&gt;
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault/gv100-: fix memory leak on module unload</title>
<updated>2020-01-15T00:50:25Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2020-01-14T20:34:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=633cc9beeb6f9b5fa2f17a2a9d0e2790cb6c3de7'/>
<id>urn:sha1:633cc9beeb6f9b5fa2f17a2a9d0e2790cb6c3de7</id>
<content type='text'>
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault/tu102: define nvkm_fault_func.pin</title>
<updated>2020-01-15T00:50:25Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2020-01-09T05:46:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0514a6b7d9c838244d5b0970523dff4b87993a64'/>
<id>urn:sha1:0514a6b7d9c838244d5b0970523dff4b87993a64</id>
<content type='text'>
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault: Add support for GP10B</title>
<updated>2020-01-15T00:49:58Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2019-12-09T11:59:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0ac7facb7071836154687a228eaead3fc82297c1'/>
<id>urn:sha1:0ac7facb7071836154687a228eaead3fc82297c1</id>
<content type='text'>
There is no BAR2 on GP10B and there is no need to map through BAR2
because all memory is shared between the GPU and the CPU. Add a custom
implementation of the fault sub-device that uses nvkm_memory_addr()
instead of nvkm_memory_bar2() to return the address of a pinned fault
buffer.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau: fix bogus GPL-2 license header</title>
<updated>2019-07-19T06:26:51Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2019-07-05T05:11:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b0f84a84fff180718995b1269da2988e5b28be42'/>
<id>urn:sha1:b0f84a84fff180718995b1269da2988e5b28be42</id>
<content type='text'>
The bulk SPDX addition made all these files into GPL-2.0 licensed files.
However the remainder of the project is MIT-licensed, these files
were simply missing the boiler plate and got caught up in the global update.

Fixes: 96ac6d4351004 (treewide: Add SPDX license identifier - Kbuild)
Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Kbuild</title>
<updated>2019-05-30T18:32:33Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2019-05-30T12:03:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=96ac6d435100450f0565708d9b885ea2a7400e0a'/>
<id>urn:sha1:96ac6d435100450f0565708d9b885ea2a7400e0a</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

      GPL-2.0

Reported-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault/gv100-: expose VoltaFaultBufferA</title>
<updated>2019-02-19T23:00:01Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2018-05-08T10:39:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a261a20c0177fa08886cf7941791aaabe48d065d'/>
<id>urn:sha1:a261a20c0177fa08886cf7941791aaabe48d065d</id>
<content type='text'>
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.

Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/nouveau/fault/gp100: expose MaxwellFaultBufferA</title>
<updated>2019-02-19T23:00:00Z</updated>
<author>
<name>Ben Skeggs</name>
<email>bskeggs@redhat.com</email>
</author>
<published>2018-05-08T10:39:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=13e957290647eafe75cfa46a5f1aaa2282d9a09c'/>
<id>urn:sha1:13e957290647eafe75cfa46a5f1aaa2282d9a09c</id>
<content type='text'>
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.

Signed-off-by: Ben Skeggs &lt;bskeggs@redhat.com&gt;
</content>
</entry>
</feed>
