linux-dev/drivers/hid/intel-ish-hid/ipc/ipc.c, branch linus/master

HID: intel-ish-hid: ipc: Specify no cache snooping on TGL and ADL

2022-01-06T14:39:43Z

Specify that both TGL and ADL don't support DMA cache snooping. Signed-off-by: Ye Xiang Signed-off-by: Jiri Kosina

HID: intel-ish-hid: ipc: Specify that EHL no cache snooping

2021-06-14T13:55:09Z

Specify that EHL doesn't support DMA cache snooping. Acked-by: Pandruvada, Srinivas Signed-off-by: Even Xu Signed-off-by: Jiri Kosina

HID: intel-ish-hid: ipc: Correct fw_reset_work_fn() function name in header

2021-04-07T15:56:34Z

Fixes the following W=1 kernel build warning(s): drivers/hid/intel-ish-hid/ipc/ipc.c:553: warning: expecting prototype for ish_fw_reset_work_fn(). Prototype was for fw_reset_work_fn() instead Cc: Srinivas Pandruvada Cc: Jiri Kosina Cc: Benjamin Tissoires Cc: Zhang Lixu Cc: "Krzysztof Wilczyński" Cc: linux-input@vger.kernel.org Signed-off-by: Lee Jones Acked-by: Srinivas Pandruvada Signed-off-by: Benjamin Tissoires

HID: intel-ish-hid: ipc: Address EHL Sx resume issues

2021-01-06T16:20:02Z

When OOB is disabled, FW will be power gated when system is in S3/S4/S5 which is the same behavior with legacy ISH FW. When OOB is enabled, FW will always power on which is totally different comparing to legacy ISH FW. So NO_D3 flag is not enough to check FW's status after resume. Here we can use IPC FW status register to check host link status. If it is false, it means FW get reset after power gated, need go through the whole initialization flow; If it is true, it means FW is alive, just set host ready bit to let fw know host is up. Co-developed-by: Wei Jiang Signed-off-by: Wei Jiang Signed-off-by: Even Xu Signed-off-by: Zhang Lixu Signed-off-by: Jiri Kosina

PCI/PM: Rename pci_dev.d3_delay to d3hot_delay

2020-09-29T19:21:50Z

PCI devices support two variants of the D3 power state: D3hot (main power present) D3cold (main power removed). Previously struct pci_dev contained: unsigned int d3_delay; /* D3->D0 transition time in ms */ unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ "d3_delay" refers specifically to the D3hot state. Rename it to "d3hot_delay" to avoid ambiguity and align with the ACPI "_DSM for Specifying Device Readiness Durations" in the PCI Firmware spec r3.2, sec 4.6.9. There is no change to the functionality. Link: https://lore.kernel.org/r/20200730210848.1578826-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński Signed-off-by: Bjorn Helgaas

HID: intel-ish-hid: ipc: set NO_D3 flag only when needed

2019-08-19T12:01:50Z

Currently, the NO_D3 flag is set in ish_probe(), and cleared in ish_remove(). So even if the system goes into S3, ISH is still in D0i3 state. It makes more sense that put ISH into D3 as system goes into S3 and put ISH into D0i3 as system goes into suspend-to-idle. I remove the NO_D3 setting in ish_probe(), so that ISH can enter D3 state when system enters S3. Only set N0_D3 flag when system enters the suspend-to-idle or platform specified, and clear it when system resume. When the ISH enters D3, the FW will check the DMA bit status. If the DMA bit is set, the FW will reset automatically. So the DMA bit need be clear before putting ISH into D3 state. Signed-off-by: Zhang Lixu Acked-by: Srinivas Pandruvada Signed-off-by: Jiri Kosina

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288

2019-06-05T15:36:37Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Alexios Zavras Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman

Merge branch 'for-5.1/i2c-hid' into for-linus

2019-03-05T14:42:51Z

Fix dmesg flood for Elan touchpanels which are too slow to assert IRQ from Kai-Heng Feng

HID: intel-ish-hid: move doorbell writing before flush

2019-02-15T21:47:21Z

Reading of IPC_REG_ISH_HOST_FWSTS will flush both message register and doorbell. So move the doorbell write before reading of IPC_REG_ISH_HOST_FWSTS. Signed-off-by: Hong Liu Tested-by: Hongyan Song Acked-by: Srinivas Pandruvada Signed-off-by: Jiri Kosina

HID: intel-ish-hid: Optimize writing ipc message from queue

2019-02-15T21:47:21Z

Currently we are using one additional static variable and a spinlock to prevent contention of writing IPC messages to ISH hardware, which is not necessary. Once ISH is ready to accept new data, we can push new data to hardware. This pushing of new data is already protected by wr_processing_spinlock for contention, which is enough. So use this spinlock to check both readiness for accepting new data and once ready allow writing of ipc message from queue to ISH hardware. While here, cleaned up some space after return. Signed-off-by: Hong Liu Tested-by: Hongyan Song Acked-by: Srinivas Pandruvada Signed-off-by: Jiri Kosina