<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/i2c/busses/Makefile, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/i2c/busses/Makefile?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/i2c/busses/Makefile?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-09-28T20:02:17Z</updated>
<entry>
<title>i2c: microchip: pci1xxxx: Add driver for I2C host controller in multifunction endpoint of pci1xxxx switch</title>
<updated>2022-09-28T20:02:17Z</updated>
<author>
<name>Tharun Kumar P</name>
<email>tharunkumar.pasumarthi@microchip.com</email>
</author>
<published>2022-09-27T08:59:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3616936972493923afa4a11dc9f707b117e2bdf4'/>
<id>urn:sha1:3616936972493923afa4a11dc9f707b117e2bdf4</id>
<content type='text'>
Microchip pci1xxxx is an unmanaged PCIe3.1a Switch for Consumer,
Industrial and Automotive applications. This switch has multiple
downstream ports. In one of the Switch's Downstream port, there
is a multifunction endpoint for peripherals which includes an I2C
host controller. The I2C function in the endpoint operates at 100KHz,
400KHz and 1 MHz and has buffer depth of 128 bytes.
This patch provides the I2C controller driver for the I2C function
of the switch.

Signed-off-by: Tharun Kumar P &lt;tharunkumar.pasumarthi@microchip.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: Add Renesas RZ/V2M controller</title>
<updated>2022-07-22T16:46:41Z</updated>
<author>
<name>Phil Edworthy</name>
<email>phil.edworthy@renesas.com</email>
</author>
<published>2022-07-08T10:03:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e0ca796a151bd4de76efd71aade2b4805a95c93d'/>
<id>urn:sha1:e0ca796a151bd4de76efd71aade2b4805a95c93d</id>
<content type='text'>
Yet another i2c controller from Renesas that is found on the RZ/V2M
(r9a09g011) SoC. It can support only 100kHz and 400KHz operation.

Signed-off-by: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
[wsa: removed superfluous class type and renamed a function]
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: add support for microchip fpga i2c controllers</title>
<updated>2022-07-07T20:54:29Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2022-07-06T14:13:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=64a6f1c4987e027339818b9d142257e7ede6dfe0'/>
<id>urn:sha1:64a6f1c4987e027339818b9d142257e7ede6dfe0</id>
<content type='text'>
Add Microchip CoreI2C i2c controller support. This driver supports the
"hard" i2c controller on the Microchip PolarFire SoC &amp; the basic feature
set for "soft" i2c controller implemtations in the FPGA fabric.

Co-developed-by: Daire McNamara &lt;daire.mcnamara@microchip.com&gt;
Signed-off-by: Daire McNamara &lt;daire.mcnamara@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: npcm: Support NPCM845</title>
<updated>2022-06-08T20:01:27Z</updated>
<author>
<name>Tyrone Ting</name>
<email>kfting@nuvoton.com</email>
</author>
<published>2022-05-25T03:23:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bbc38ed53a02a759d8e5c01e834eca49304a2315'/>
<id>urn:sha1:bbc38ed53a02a759d8e5c01e834eca49304a2315</id>
<content type='text'>
Add NPCM8XX I2C support.
The NPCM8XX uses a similar i2c module as NPCM7XX.
The internal HW FIFO is larger in NPCM8XX.

Signed-off-by: Tyrone Ting &lt;kfting@nuvoton.com&gt;
Acked-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: Introduce common module to instantiate CCGx UCSI</title>
<updated>2022-02-15T09:04:53Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2022-01-05T14:19:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4ebf4987c0918ec6a08ece8ee745af44af02dee0'/>
<id>urn:sha1:4ebf4987c0918ec6a08ece8ee745af44af02dee0</id>
<content type='text'>
Introduce a common module to provide an API to instantiate UCSI device
for Cypress CCGx Type-C controller. Individual bus drivers need to select
this one on demand.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: designware: Add AMD PSP I2C bus support</title>
<updated>2022-02-11T14:38:23Z</updated>
<author>
<name>Jan Dabros</name>
<email>jsd@semihalf.com</email>
</author>
<published>2022-02-08T14:12:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=78d5e9e299e31bc2deaaa94a45bf8ea024f27e8c'/>
<id>urn:sha1:78d5e9e299e31bc2deaaa94a45bf8ea024f27e8c</id>
<content type='text'>
Implement an I2C controller sharing mechanism between the host (kernel)
and PSP co-processor on some platforms equipped with AMD Cezanne SoC.

On these platforms we need to implement "software" i2c arbitration.
Default arbitration owner is PSP and kernel asks for acquire as well
as inform about release of the i2c bus via mailbox mechanism.

            +---------+
 &lt;- ACQUIRE |         |
  +---------|   CPU   |\
  |         |         | \      +----------+  SDA
  |         +---------+  \     |          |-------
MAILBOX                   +--&gt; |  I2C-DW  |  SCL
  |         +---------+        |          |-------
  |         |         |        +----------+
  +---------|   PSP   |
   &lt;- ACK   |         |
            +---------+

            +---------+
 &lt;- RELEASE |         |
  +---------|   CPU   |
  |         |         |        +----------+  SDA
  |         +---------+        |          |-------
MAILBOX                   +--&gt; |  I2C-DW  |  SCL
  |         +---------+  /     |          |-------
  |         |         | /      +----------+
  +---------|   PSP   |/
   &lt;- ACK   |         |
            +---------+

The solution is similar to i2c-designware-baytrail.c implementation, where
we are using a generic i2c-designware-* driver with a small "wrapper".

In contrary to baytrail semaphore implementation, beside internal
acquire_lock() and release_lock() methods we are also applying quirks to
lock_bus() and unlock_bus() global adapter methods. With this in place
all i2c clients drivers may lock i2c bus for a desired number of i2c
transactions (e.g. write-wait-read) without being aware of that such bus
is shared with another entity.

Modify i2c_dw_probe_lock_support() to select correct semaphore
implementation at runtime, since now we have more than one available.

Configure new matching ACPI ID "AMDI0019" and register
ARBITRATION_SEMAPHORE flag in order to distinguish setup with PSP
arbitration.

Add myself as a reviewer for I2C DesignWare in order to help with reviewing
and testing possible changes touching new i2c-designware-amdpsp.c module.

Signed-off-by: Jan Dabros &lt;jsd@semihalf.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Tested-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
[wsa: removed unneeded blank line and curly braces]
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: Remove unused Netlogic/Sigma Designs XLR driver</title>
<updated>2021-11-23T09:00:29Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-11-09T16:16:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=77e0164630364ebd738f8cc1858f41e655acf38c'/>
<id>urn:sha1:77e0164630364ebd738f8cc1858f41e655acf38c</id>
<content type='text'>
Commits 95b8a5e0111a ("MIPS: Remove NETLOGIC support") and edd4488aea9c
("ARM: remove tango platform") removed Netlogic XLR and Sigma Designs
Tango platforms which means there are no platforms using the XLR I2C
driver and it can be removed.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: pasemi: Add Apple platform driver</title>
<updated>2021-10-11T09:45:48Z</updated>
<author>
<name>Sven Peter</name>
<email>sven@svenpeter.dev</email>
</author>
<published>2021-10-08T16:35:31Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d88ae2932df0e670610cb741fec442ad12466c03'/>
<id>urn:sha1:d88ae2932df0e670610cb741fec442ad12466c03</id>
<content type='text'>
With all the previous preparations we can now finally add
the platform driver to support the PASemi-based controllers
in Apple SoCs. This does not work on the M1 yet but should
work on the early iPhones already.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Sven Peter &lt;sven@svenpeter.dev&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Tested-by: Christian Zigotzky &lt;chzigotzky@xenosoft.de&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: pasemi: Split pci driver to its own file</title>
<updated>2021-10-11T09:45:16Z</updated>
<author>
<name>Sven Peter</name>
<email>sven@svenpeter.dev</email>
</author>
<published>2021-10-08T16:35:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9bc5f4f660ff3e37113847d749d43fafbadec629'/>
<id>urn:sha1:9bc5f4f660ff3e37113847d749d43fafbadec629</id>
<content type='text'>
Split off the PCI driver so that we can reuse common code for the
platform driver.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Sven Peter &lt;sven@svenpeter.dev&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Tested-by: Christian Zigotzky &lt;chzigotzky@xenosoft.de&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
<entry>
<title>i2c: virtio: add a virtio i2c frontend driver</title>
<updated>2021-08-19T19:21:19Z</updated>
<author>
<name>Jie Deng</name>
<email>jie.deng@intel.com</email>
</author>
<published>2021-07-23T05:44:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3cfc88380413d20f777dc6648a38f683962e52bf'/>
<id>urn:sha1:3cfc88380413d20f777dc6648a38f683962e52bf</id>
<content type='text'>
Add an I2C bus driver for virtio para-virtualization.

The controller can be emulated by the backend driver in
any device model software by following the virtio protocol.

The device specification can be found on
https://lists.oasis-open.org/archives/virtio-comment/202101/msg00008.html.

By following the specification, people may implement different
backend drivers to emulate different controllers according to
their needs.

Co-developed-by: Conghui Chen &lt;conghui.chen@intel.com&gt;
Signed-off-by: Conghui Chen &lt;conghui.chen@intel.com&gt;
Signed-off-by: Jie Deng &lt;jie.deng@intel.com&gt;
Reviewed-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Tested-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@kernel.org&gt;
</content>
</entry>
</feed>
