<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/infiniband/hw/mlx5/cmd.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/infiniband/hw/mlx5/cmd.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/infiniband/hw/mlx5/cmd.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-09-28T15:31:21Z</updated>
<entry>
<title>IB/mlx5: Enable UAR to have DevX UID</title>
<updated>2021-09-28T15:31:21Z</updated>
<author>
<name>Meir Lichtinger</name>
<email>meirl@nvidia.com</email>
</author>
<published>2021-09-22T08:28:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d2c8a1554c10d5e0443b1f97f480d7dacd55cf55'/>
<id>urn:sha1:d2c8a1554c10d5e0443b1f97f480d7dacd55cf55</id>
<content type='text'>
UID field was added to alloc_uar and dealloc_uar PRM command, to specify
DevX UID for UAR. This change enables firmware validating user access to
its own UAR resources.

For the kernel allocated UARs the UID will stay 0 as of today.

Signed-off-by: Meir Lichtinger &lt;meirl@nvidia.com&gt;
Reviewed-by: Yishai Hadas &lt;yishaih@nvidia.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/mlx5: Move all DM logic to separate file</title>
<updated>2021-04-13T22:36:36Z</updated>
<author>
<name>Maor Gottlieb</name>
<email>maorg@nvidia.com</email>
</author>
<published>2021-04-11T12:29:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=831df88381f73bca0f5624b69ab985cac3d036bc'/>
<id>urn:sha1:831df88381f73bca0f5624b69ab985cac3d036bc</id>
<content type='text'>
Move all device memory related code to a separate file.

Link: https://lore.kernel.org/r/20210411122924.60230-4-leon@kernel.org
Signed-off-by: Maor Gottlieb &lt;maorg@nvidia.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@nvidia.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA: Convert RWQ table logic to ib_core allocation scheme</title>
<updated>2020-09-17T17:04:33Z</updated>
<author>
<name>Leon Romanovsky</name>
<email>leonro@mellanox.com</email>
</author>
<published>2020-09-02T08:16:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c0a6b5ecc5b7dd028c2921415ea036074a8f8b00'/>
<id>urn:sha1:c0a6b5ecc5b7dd028c2921415ea036074a8f8b00</id>
<content type='text'>
Move struct ib_rwq_ind_table allocation to ib_core.

Link: https://lore.kernel.org/r/20200902081623.746359-3-leon@kernel.org
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA: Restore ability to fail on PD deallocate</title>
<updated>2020-09-09T16:57:22Z</updated>
<author>
<name>Leon Romanovsky</name>
<email>leonro@mellanox.com</email>
</author>
<published>2020-09-07T12:09:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=91a7c58fce065506fd98954d27694e5d83c96638'/>
<id>urn:sha1:91a7c58fce065506fd98954d27694e5d83c96638</id>
<content type='text'>
The IB verbs objects are counted by the kernel and ib_core ensures that
deallocate PD will success so it will be called once all other objects
that depends on PD will be released. This is achieved by managing various
reference counters on such objects.

The mlx5 driver didn't follow this standard flow when allowed DEVX objects
that are not managed by ib_core to be interleaved with the ones under
ib_core responsibility.

In such interleaved scenarios deallocate command can fail and ib_core will
leave uobject in internal DB and attempt to clean it later to free
resources anyway.

This change partially restores returned value from dealloc_pd() for all
drivers, but keeping in mind that non-DEVX devices and kernel verbs paths
shouldn't fail.

Fixes: 21a428a019c9 ("RDMA: Handle PD allocations by IB/core")
Link: https://lore.kernel.org/r/20200907120921.476363-2-leon@kernel.org
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/mlx5: Separate counters from main.c</title>
<updated>2020-07-07T17:05:51Z</updated>
<author>
<name>Leon Romanovsky</name>
<email>leonro@mellanox.com</email>
</author>
<published>2020-07-02T08:18:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=64825827ae3a53e01fc9bb9483b1a2ed7cb2b657'/>
<id>urn:sha1:64825827ae3a53e01fc9bb9483b1a2ed7cb2b657</id>
<content type='text'>
There are number of counters types supported in mlx5_ib: HW counters,
congestion counters, Q-counters and flow counters. Almost all supporting
code was placed in main.c that made almost impossible to maintain the code
anymore. Let's create separate code namespace for the counters to easy
future generalization effort.

Link: https://lore.kernel.org/r/20200702081809.423482-4-leon@kernel.org
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/mlx5: Update mlx5_ib to use new cmd interface</title>
<updated>2020-05-06T20:42:45Z</updated>
<author>
<name>Leon Romanovsky</name>
<email>leonro@mellanox.com</email>
</author>
<published>2020-05-06T06:55:11Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=31578defe4eb816439d5e3351923e90f6321b3c8'/>
<id>urn:sha1:31578defe4eb816439d5e3351923e90f6321b3c8</id>
<content type='text'>
Reuse newly introduced mlx5_cmd_exec_in() and mlx5_cmd_exec_inout() to
reduce code duplication in mlx5_ib module.

Link: https://lore.kernel.org/r/20200506065513.4668-2-leon@kernel.org
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>RDMA/mlx5: Delete Q counter allocations command</title>
<updated>2020-04-19T12:53:20Z</updated>
<author>
<name>Leon Romanovsky</name>
<email>leonro@mellanox.com</email>
</author>
<published>2020-04-03T10:31:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bfd745f8f327c40d74c8207ca62db05a264b5b7c'/>
<id>urn:sha1:bfd745f8f327c40d74c8207ca62db05a264b5b7c</id>
<content type='text'>
Remove mlx5_ib implementation of Q counter allocation logic
together with cleaning boolean which controlled validity of the
counter. It is not needed, because counter_id == 0 means that
counter is not valid.

Reviewed-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
</content>
</entry>
<entry>
<title>IB/mlx5: Fix device memory flows</title>
<updated>2019-12-12T21:55:36Z</updated>
<author>
<name>Yishai Hadas</name>
<email>yishaih@mellanox.com</email>
</author>
<published>2019-12-12T10:02:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dc2316eba73ff03da6dde082a372c6b5209304c5'/>
<id>urn:sha1:dc2316eba73ff03da6dde082a372c6b5209304c5</id>
<content type='text'>
Fix device memory flows so that only once there will be no live mmaped
VA to a given allocation the matching object will be destroyed.

This prevents a potential scenario that existing VA that was mmaped by
one process might still be used post its deallocation despite that it's
owned now by other process.

The above is achieved by integrating with IB core APIs to manage
mmap/munmap. Only once the refcount will become 0 the DM object and its
underlay area will be freed.

Fixes: 3b113a1ec3d4 ("IB/mlx5: Support device memory type attribute")
Signed-off-by: Yishai Hadas &lt;yishaih@mellanox.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Link: https://lore.kernel.org/r/20191212100237.330654-3-leon@kernel.org
Signed-off-by: Doug Ledford &lt;dledford@redhat.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Move device memory management to mlx5_core</title>
<updated>2019-09-02T06:44:41Z</updated>
<author>
<name>Ariel Levkovich</name>
<email>lariel@mellanox.com</email>
</author>
<published>2019-08-29T23:42:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c9b9dcb430b3cd0ad2b04c360c4e528d73430481'/>
<id>urn:sha1:c9b9dcb430b3cd0ad2b04c360c4e528d73430481</id>
<content type='text'>
Move the device memory allocation and deallocation commands
SW ICM memory to mlx5_core to expose this API for all
mlx5_core users.

This comes as preparation for supporting SW steering in kernel
where it will be required to allocate and register device
memory for direct rule insertion.

In addition, an API to register this device memory for future
remote access operations is introduced using the create_mkey
commands.

Signed-off-by: Ariel Levkovich &lt;lariel@mellanox.com&gt;
Reviewed-by: Mark Bloch &lt;markb@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>mlx5: avoid 64-bit division</title>
<updated>2019-05-29T16:03:21Z</updated>
<author>
<name>Michal Kubecek</name>
<email>mkubecek@suse.cz</email>
</author>
<published>2019-05-20T11:19:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=37eb86c4507abcb14fc346863e83aa8751aa4675'/>
<id>urn:sha1:37eb86c4507abcb14fc346863e83aa8751aa4675</id>
<content type='text'>
Commit 25c13324d03d ("IB/mlx5: Add steering SW ICM device memory type")
breaks i386 build by introducing three 64-bit divisions. As the divisor is
MLX5_SW_ICM_BLOCK_SIZE() which is always a power of 2, we can replace the
division with bit operations.

Fixes: 25c13324d03d ("IB/mlx5: Add steering SW ICM device memory type")
Signed-off-by: Michal Kubecek &lt;mkubecek@suse.cz&gt;
Reviewed-by: Leon Romanovsky &lt;leonro@mellanox.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
</feed>
