Linux kernel development work - see feature branches https://git.zx2c4.com/linux-dev/atom/drivers/interconnect/qcom?h=linus%2Fmaster 2022-05-18T00:03:30Z 2022-05-18T00:03:30Z Georgi Djakov djakov@kernel.org 2022-05-18T00:03:30Z urn:sha1:3a4c63f5d904d83852a2e4df13fcb89cce977405 This patch set is to address two clock rate setting issues. The first patch is to fix a potential cached clock rate mismatching issue, the issue can lead to the clock rate is missed to be set. Note, since this potential issue requires specific time window and certain condition (consumers need to request the same bandwidth) to produce, the patch is based on analysis but not a real trace log. The second patch is an extension to cache clock rates for active and sleep clocks separately, with this change it gives us possibility to set active and sleep clock with different clock rates. * icc-rpm interconnect: qcom: icc-rpm: Fix for cached clock rate interconnect: qcom: icc-rpm: Cache every clock rate Link: https://lore.kernel.org/r/20220416031029.693211-1-leo.yan@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-18T00:02:55Z Georgi Djakov djakov@kernel.org 2022-05-18T00:02:55Z urn:sha1:314cf651fa83b83aa487299cdfe95fe1e8fb8fbe This contains a few fixes for the sc8180x interconnect provider driver to make it functional. * icc-sc8180x dt-bindings: interconnect: Add SC8180X QUP0 virt provider interconnect: qcom: sc8180x: Modernize sc8180x probe interconnect: qcom: sc8180x: Fix QUP0 nodes interconnect: qcom: sc8180x: Mark some BCMs keepalive Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-18T00:02:32Z Georgi Djakov djakov@kernel.org 2022-05-17T23:42:42Z urn:sha1:016fca59f95f6a327595b8f3f3c39979c177d676 Constify structs that are not modified. Link: https://lore.kernel.org/r/20220412102623.227607-1-krzysztof.kozlowski@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:51:34Z Bjorn Andersson bjorn.andersson@linaro.org 2022-05-03T22:53:00Z urn:sha1:04548d4e2798d4b90f8270b8bb708038dd33d7fa The Qualcomm interconnect providers started off defining nodes and BCMs using the DEFINE_QNODE() and DEFINE_QBCM() macros. Unfortunately this results in a block of long lines that are hard to read, a transition to explicitly stated definition has been made for newly introduced platforms. Transition the SC8180X interconnect provider driver to this style as well, to make it easier to read while debugging interconnect related issues. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503225300.1141814-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:51:34Z Bjorn Andersson bjorn.andersson@linaro.org 2022-05-03T21:19:25Z urn:sha1:ce83211c87caaf3a19e24225809db53b8051264c In line with other platforms, mark BCMs controlling paths between the CPU, AOSS, GIC and memory as keepalive. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-5-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:51:34Z Bjorn Andersson bjorn.andersson@linaro.org 2022-05-03T21:19:24Z urn:sha1:42c4e3f670b97df0c9e23ca2f7080ff7cd591837 The QUP0 BCM relates to some internal property of the QUPs, and should be configured independently of the path to the QUP. In line with other platforms expose QUP_CORE endpoints in order allow this configuration. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-4-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:51:33Z Bjorn Andersson bjorn.andersson@linaro.org 2022-05-03T21:19:23Z urn:sha1:a3e45cf838c8eb91628b03862595861c6d426c1a The introduction of the Qualcomm SC8180X provider raced with the refactoring of the RPMh common code and SC8180X was left with the old style of duplicating the probe function in each provider driver. Transition the driver to the "new" design. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220503211925.1022169-3-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:40:50Z Georgi Djakov djakov@kernel.org 2022-05-17T23:40:50Z urn:sha1:828ff75c44f47fb049d53a63fa92782680ba5c27 This adds interconnect driver support for SDX65 platform for scaling the bandwidth requirements over RPMh. Link: https://lore.kernel.org/r/1649854415-11174-1-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-17T23:40:00Z Georgi Djakov djakov@kernel.org 2022-05-17T23:40:00Z urn:sha1:bb4b905b738cbc230873fd0ff0e62cd7499c1b11 Add interconnect driver support for Qualcomm SC8280XP platform. * icc-sc8280xp dt-bindings: interconnect: qcom: Add sc8280xp binding interconnect: qcom: Add SC8280XP interconnect provider interconnect: qcom: sc8280xp: constify qcom_icc_desc interconnect: qcom: sc8280xp: constify icc_node pointers interconnect: qcom: sc8280xp: constify qcom_icc_bcm pointers Link: https://lore.kernel.org/r/20220408214835.624494-1-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org> 2022-05-04T07:46:18Z Leo Yan leo.yan@linaro.org 2022-05-04T07:46:18Z urn:sha1:97f7d384ac4fcadfc0fb83519be23ccd59b4250b The cached clock rate is used for all bus clocks, thus it has the assumption that all interconnect clock rates are always same, this causes trouble if we want to set different clock rates separately. This patch is to allocate a clock rate array to cache every clock rate. Signed-off-by: Leo Yan <leo.yan@linaro.org> Link: https://lore.kernel.org/r/20220416031029.693211-3-leo.yan@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>