<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/irqchip, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/irqchip?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/irqchip?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-06-10T07:57:19Z</updated>
<entry>
<title>irqchip/loongson-liointc: Use architecture register to get coreid</title>
<updated>2022-06-10T07:57:19Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2022-06-09T17:52:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6fac824f40987a54a08dfbcc36145869d02e45b1'/>
<id>urn:sha1:6fac824f40987a54a08dfbcc36145869d02e45b1</id>
<content type='text'>
fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for
LoongArch") replaced get_ebase_cpunum with physical processor
id from SMP facilities. However that breaks MIPS non-SMP build
and makes booting from other cores inpossible on non-SMP kernel.

Thus we revert get_ebase_cpunum back and use get_csr_cpuid for
LoongArch.

Fixes: fa84f89395e0 ("irqchip/loongson-liointc: Fix build error for LoongArch")
Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220609175242.977-1-jiaxun.yang@flygoat.com
</content>
</entry>
<entry>
<title>irqchip/uniphier-aidet: Add compatible string for NX1 SoC</title>
<updated>2022-06-09T16:41:57Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2022-05-20T05:17:02Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e3f056a7aafabe4ac3ad4b7465ba821b44a7e639'/>
<id>urn:sha1:e3f056a7aafabe4ac3ad4b7465ba821b44a7e639</id>
<content type='text'>
Add the compatible string to support UniPhier NX1 SoC, which has the same
kinds of controls as the other UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/1653023822-19229-3-git-send-email-hayashi.kunihiko@socionext.com
</content>
</entry>
<entry>
<title>irqchip/realtek-rtl: Fix refcount leak in map_interrupts</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=eff4780f83d0ae3e5b6c02ff5d999dc4c1c5c8ce'/>
<id>urn:sha1:eff4780f83d0ae3e5b6c02ff5d999dc4c1c5c8ce</id>
<content type='text'>
of_find_node_by_phandle() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
This function doesn't call of_node_put() in error path.
Call of_node_put() directly after of_property_read_u32() to cover
both normal path and error path.

Fixes: 9f3a0f34b84a ("irqchip: Add support for Realtek RTL838x/RTL839x interrupt controller")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-7-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/gic-v3: Fix refcount leak in gic_populate_ppi_partitions</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:29Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fa1ad9d4cc47ca2470cd904ad4519f05d7e43a2b'/>
<id>urn:sha1:fa1ad9d4cc47ca2470cd904ad4519f05d7e43a2b</id>
<content type='text'>
of_find_node_by_phandle() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: e3825ba1af3a ("irqchip/gic-v3: Add support for partitioned PPIs")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-6-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/gic-v3: Fix error handling in gic_populate_ppi_partitions</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ec8401a429ffee34ccf38cebf3443f8d5ae6cb0d'/>
<id>urn:sha1:ec8401a429ffee34ccf38cebf3443f8d5ae6cb0d</id>
<content type='text'>
of_get_child_by_name() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
When kcalloc fails, it missing of_node_put() and results in refcount
leak. Fix this by goto out_put_node label.

Fixes: 52085d3f2028 ("irqchip/gic-v3: Dynamically allocate PPI partition descriptors")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-5-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/apple-aic: Fix refcount leak in aic_of_ic_init</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3d45670fab3c25a7452721e4588cc95c51cda134'/>
<id>urn:sha1:3d45670fab3c25a7452721e4588cc95c51cda134</id>
<content type='text'>
of_get_child_by_name() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: a5e8801202b3 ("irqchip/apple-aic: Parse FIQ affinities from device-tree")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-4-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/apple-aic: Fix refcount leak in build_fiq_affinity</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:26Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b1ac803f47cb1615468f35cf1ccb553c52087301'/>
<id>urn:sha1:b1ac803f47cb1615468f35cf1ccb553c52087301</id>
<content type='text'>
of_find_node_by_phandle() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: a5e8801202b3 ("irqchip/apple-aic: Parse FIQ affinities from device-tree")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-3-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/gic/realview: Fix refcount leak in realview_gic_of_init</title>
<updated>2022-06-09T16:36:57Z</updated>
<author>
<name>Miaoqian Lin</name>
<email>linmq006@gmail.com</email>
</author>
<published>2022-06-01T08:09:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f4b98e314888cc51486421bcf6d52852452ea48b'/>
<id>urn:sha1:f4b98e314888cc51486421bcf6d52852452ea48b</id>
<content type='text'>
of_find_matching_node_and_match() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.

Fixes: 82b0a434b436 ("irqchip/gic/realview: Support more RealView DCC variants")
Signed-off-by: Miaoqian Lin &lt;linmq006@gmail.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220601080930.31005-2-linmq006@gmail.com
</content>
</entry>
<entry>
<title>irqchip/xilinx: Remove microblaze+zynq dependency</title>
<updated>2022-06-09T16:34:56Z</updated>
<author>
<name>Jamie Iles</name>
<email>jamie@jamieiles.com</email>
</author>
<published>2022-06-06T21:39:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b84dc7f0e3646d480b6972c5f25586215c5f33e2'/>
<id>urn:sha1:b84dc7f0e3646d480b6972c5f25586215c5f33e2</id>
<content type='text'>
The Xilinx IRQ controller doesn't really have any architecture
dependencies - it's a generic AXI component that can be used for any
FPGA core from Zynq hard processor systems to microblaze+riscv soft
cores and more.

Signed-off-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20220606213952.298686-1-jamie@jamieiles.com
</content>
</entry>
<entry>
<title>irqchip/loongson-liointc: Fix build error for LoongArch</title>
<updated>2022-06-03T12:09:27Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2022-05-31T10:04:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fa84f89395e0383b94ae2822003d8940fdb24d3c'/>
<id>urn:sha1:fa84f89395e0383b94ae2822003d8940fdb24d3c</id>
<content type='text'>
liointc driver is shared by MIPS and LoongArch, this patch adjust the
code to fix build error for LoongArch.

Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: WANG Xuerui &lt;git@xen0n.name&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
</feed>
