<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/misc/habanalabs/gaudi2, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/misc/habanalabs/gaudi2?h=master</id>
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<updated>2022-10-11T23:42:58Z</updated>
<entry>
<title>treewide: use get_random_u32() when possible</title>
<updated>2022-10-11T23:42:58Z</updated>
<author>
<name>Jason A. Donenfeld</name>
<email>Jason@zx2c4.com</email>
</author>
<published>2022-10-05T15:43:22Z</published>
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<id>urn:sha1:a251c17aa558d8e3128a528af5cf8b9d7caae4fd</id>
<content type='text'>
The prandom_u32() function has been a deprecated inline wrapper around
get_random_u32() for several releases now, and compiles down to the
exact same code. Replace the deprecated wrapper with a direct call to
the real function. The same also applies to get_random_int(), which is
just a wrapper around get_random_u32(). This was done as a basic find
and replace.

Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Reviewed-by: Yury Norov &lt;yury.norov@gmail.com&gt;
Reviewed-by: Jan Kara &lt;jack@suse.cz&gt; # for ext4
Acked-by: Toke Høiland-Jørgensen &lt;toke@toke.dk&gt; # for sch_cake
Acked-by: Chuck Lever &lt;chuck.lever@oracle.com&gt; # for nfsd
Acked-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt; # for thunderbolt
Acked-by: Darrick J. Wong &lt;djwong@kernel.org&gt; # for xfs
Acked-by: Helge Deller &lt;deller@gmx.de&gt; # for parisc
Acked-by: Heiko Carstens &lt;hca@linux.ibm.com&gt; # for s390
Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: allow user to flush PCIE by read</title>
<updated>2022-09-19T12:10:01Z</updated>
<author>
<name>Ofir Bitton</name>
<email>obitton@habana.ai</email>
</author>
<published>2022-09-15T08:10:56Z</published>
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<id>urn:sha1:bb677d527e14184d89012ce332128f3767fa9925</id>
<content type='text'>
In order for the user to flush PCIE he needs to read some register
from PCIE block. The chosen register is SPECIAL_GLBL_SPARE_0 and
hence needs to be unsecured.

Signed-off-by: Ofir Bitton &lt;obitton@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: Remove unnecessary (void*) conversions</title>
<updated>2022-09-19T12:08:40Z</updated>
<author>
<name>Li zeming</name>
<email>zeming@nfschina.com</email>
</author>
<published>2022-09-19T02:20:54Z</published>
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<id>urn:sha1:006fd8cb659bb02789dc1ec48836fff5f348ba8d</id>
<content type='text'>
The void pointer object can be directly assigned to different structure
objects, it does not need to be cast.

Signed-off-by: Li zeming &lt;zeming@nfschina.com&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: add handling to pmmu events in eqe handler</title>
<updated>2022-09-19T12:08:39Z</updated>
<author>
<name>Dani Liberman</name>
<email>dliberman@habana.ai</email>
</author>
<published>2022-09-08T15:24:41Z</published>
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<id>urn:sha1:43657dadfeffbec63b9ed358e6f82e9c64ff334c</id>
<content type='text'>
In order to get the error cause and the captured address in case of
page fault, added pmmu events to eqe handler.

Signed-off-by: Dani Liberman &lt;dliberman@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: get f/w reset status register dynamically</title>
<updated>2022-09-19T12:08:39Z</updated>
<author>
<name>farah kassabri</name>
<email>fkassabri@habana.ai</email>
</author>
<published>2022-08-29T13:56:28Z</published>
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<id>urn:sha1:04d53cd2a6fb9936c938b624d99320cf2f842758</id>
<content type='text'>
Get the firmware reset status address from the dynamic registers
we read from the firmware instead of using a define.

Signed-off-by: farah kassabri &lt;fkassabri@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: increase hard-reset sleep time to 2 sec</title>
<updated>2022-09-19T12:08:39Z</updated>
<author>
<name>Tomer Tayar</name>
<email>ttayar@habana.ai</email>
</author>
<published>2022-09-06T13:37:14Z</published>
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<id>urn:sha1:f0b6d3cc29b709089f7a0de6a3d64a73ed0d67bd</id>
<content type='text'>
The access to the device registers is blocked during hard reset, until
preboot runs and allows the access to specific registers, including the
PSOC BTM_FSM register which is used to know when the reset is done.
Between the reset request and until this register is polled there is a
small delay of 500 msec which is not enough for F/W to process the reset
and for preboot to run, so the register might be accessed while it is
blocked.
To avoid it, increase the delay to 2 sec.

Signed-off-by: Tomer Tayar &lt;ttayar@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: print RAZWI info upon PCIe access error</title>
<updated>2022-09-19T12:08:39Z</updated>
<author>
<name>Tomer Tayar</name>
<email>ttayar@habana.ai</email>
</author>
<published>2022-09-05T13:24:21Z</published>
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<id>urn:sha1:cecde184ca32ae862c5494a7875d03592c893ab9</id>
<content type='text'>
Add the dump of the RAZWI information when a PCIe access is blocked by
RR.

Signed-off-by: Tomer Tayar &lt;ttayar@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs: MMU invalidation h/w is per device</title>
<updated>2022-09-19T12:08:39Z</updated>
<author>
<name>Oded Gabbay</name>
<email>ogabbay@kernel.org</email>
</author>
<published>2022-09-05T14:14:45Z</published>
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<id>urn:sha1:82736b063fde67ea2a9b16ef5acf3d5db03e2deb</id>
<content type='text'>
The code used the mmu mutex to protect access to the context's page
tables and invalidation of the MMU cache. Because pgt are per
context, the mmu mutex was a member of the context object.

The problem is that the device has a single MMU invalidation h/w
(per MMU). Therefore, the mmu mutex should not be a property of the
context but a property of the device.

Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs: new notifier events for device state</title>
<updated>2022-09-19T12:08:38Z</updated>
<author>
<name>Tal Cohen</name>
<email>talcohen@habana.ai</email>
</author>
<published>2022-08-18T09:54:23Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6f0818c9fc9b81d8a303a8d3fb1826d71777f7ed'/>
<id>urn:sha1:6f0818c9fc9b81d8a303a8d3fb1826d71777f7ed</id>
<content type='text'>
Add new notifier events that inform several device states.
General H/W error raised on device general H/W error occurs.
User engine error is raised when a device engine informs of an error.

Signed-off-by: Tal Cohen &lt;talcohen@habana.ai&gt;
Reviewed-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
<entry>
<title>habanalabs/gaudi2: free event irq if init fails</title>
<updated>2022-09-19T12:08:38Z</updated>
<author>
<name>Oded Gabbay</name>
<email>ogabbay@kernel.org</email>
</author>
<published>2022-09-04T07:39:27Z</published>
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<id>urn:sha1:c833ac1a5f34a21e9e9f8605b2f3f9f8dcaab6a0</id>
<content type='text'>
In case initialization fails after event irq was requested, we need to
release that irq.

Signed-off-by: Oded Gabbay &lt;ogabbay@kernel.org&gt;
</content>
</entry>
</feed>
