linux-dev/drivers/mtd/spi-nor/core.c, branch linus/master

mtd: spi-nor: expose internal parameters via debugfs

2022-05-09T11:25:22Z

There is no way to gather all information to verify support for a new flash chip. Also if you want to convert an existing flash chip to the new SFDP parsing, there is not enough information to determine if the flash will work like before. To ease this development, expose internal parameters via the debugfs. Signed-off-by: Michael Walle Signed-off-by: Pratyush Yadav Reviewed-by: Pratyush Yadav Link: https://lore.kernel.org/r/20220429102018.2361038-2-michael@walle.cc

mtd: spi-nor: export spi_nor_hwcaps_pp2cmd()

2022-05-09T11:25:22Z

The function will also be used by the debugfs module. Signed-off-by: Michael Walle Signed-off-by: Pratyush Yadav Reviewed-by: Pratyush Yadav Link: https://lore.kernel.org/r/20220429102018.2361038-1-michael@walle.cc

mtd: spi-nor: move spi_nor_write_ear() to winbond module

2022-05-02T09:12:00Z

The "Extended Address Register" is winbond specific. If the flash is larger than 16MiB and is used in 3 byte address mode, it is used to set the remaining address bits. Move the write_ear() function, the opcode macros and the spimem op template into the winbond module and rename them accordingly. Signed-off-by: Michael Walle Signed-off-by: Pratyush Yadav Reviewed-by: Pratyush Yadav Link: https://lore.kernel.org/r/20220429100153.2338501-1-michael@walle.cc

mtd: spi-nor: Introduce templates for SPI NOR operations

2022-04-27T09:27:36Z

Clean the op declaration and hide the details of each op. With this it results a cleanner, easier to read code. No functional change expected. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Acked-by: Michael Walle Acked-by: Pratyush Yadav Link: https://lore.kernel.org/r/20220420103427.47867-10-tudor.ambarus@microchip.com

mtd: spi-nor: core: Add helpers to read/write any register

2022-04-27T09:27:36Z

There are manufacturers that use registers indexed by address. Some of them support "read/write any register" opcodes. Provide core methods that can be used by all manufacturers. SPI NOR controller ops are intentionally not supported as we intend to move all the SPI NOR controller drivers under the SPI subsystem. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Tested-by: Takahiro Kuwano Reviewed-by: Pratyush Yadav Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20220420103427.47867-7-tudor.ambarus@microchip.com

mtd: spi-nor: core: Introduce method for RDID op

2022-04-27T09:27:35Z

RDID is used in the core to auto detect the flash, but also by some manufacturer drivers that contain flashes that support Octal DTR mode, so that they can read the flash ID after the switch to Octal DTR was made to test if the switch was successful. Introduce a core method for RDID op to avoid code duplication. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20220420103427.47867-5-tudor.ambarus@microchip.com

mtd: spi-nor: core: Use auto-detection only once

2022-04-27T09:27:35Z

In case spi_nor_match_name() returned NULL, the auto detection was issued twice. There's no reason to try to detect the same chip twice, do the auto detection only once. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20220420103427.47867-4-tudor.ambarus@microchip.com

mtd: spi-nor: Introduce spi_nor_match_id()

2022-04-27T09:27:35Z

Similar to spi_nor_match_name() extend the search of flash_info through all the manufacturers, this time doing the match by ID. There's no reason to limit the search per manufacturer yet, do it globally, search the flash in all the parts of all manufacturers in a single method. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Reviewed-by: Pratyush Yadav Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20220420103427.47867-3-tudor.ambarus@microchip.com

mtd: spi-nor: Rename method, s/spi_nor_match_id/spi_nor_match_name

2022-04-27T09:27:35Z

The method is matching a flash_info entry by searching by name. Rename the method for better clarity. Signed-off-by: Tudor Ambarus Signed-off-by: Pratyush Yadav Reviewed-by: Pratyush Yadav Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20220420103427.47867-2-tudor.ambarus@microchip.com

mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check()

2022-04-27T09:27:35Z

Read back Status Register 1 to ensure that the written byte match the received value and return -EIO if read back test failed. Without this patch, spi_nor_write_16bit_sr_and_check() only check the second half of the 16bit. It causes errors like spi_nor_sr_unlock() return success incorrectly when spi_nor_write_16bit_sr_and_check() doesn't write SR successfully. Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") Signed-off-by: Chen-Tsung Hsieh Signed-off-by: Pratyush Yadav Reviewed-by: Michael Walle Reviewed-by: Tudor Ambarus Acked-by: Pratyush Yadav Link: https://lore.kernel.org/r/20220126073227.3401275-1-chentsung@chromium.org