linux-dev/drivers/nvmem/Makefile, branch linus/master

nvmem: Add Apple eFuse driver

2022-05-09T13:44:21Z

Apple SoCs contain eFuses used to store factory-programmed data such as calibration values for the PCIe or the Type-C PHY. They are organized as 32bit values exposed as MMIO. Signed-off-by: Sven Peter Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20220429162701.2222-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: Add driver for OCOTP in Sunplus SP7021

2022-02-25T10:49:36Z

Add driver for OCOTP in Sunplus SP7021 Signed-off-by: Vincent Shih Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20220223223502.29454-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: add driver for Layerscape SFP (Security Fuse Processor)

2022-02-21T17:00:30Z

Add support for the Security Fuse Processor found on Layerscape SoCs. This driver implements basic read access. Signed-off-by: Michael Walle Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20220220151527.17216-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: nintendo-otp: Add new driver for the Wii and Wii U OTP

2021-08-13T08:27:20Z

This OTP is read-only and contains various keys used by the console to decrypt, encrypt or verify various pieces of storage. Its size depends on the console, it is 128 bytes on the Wii and 1024 bytes on the Wii U (split into eight 128 bytes banks). It can be used directly by writing into one register and reading from the other one, without any additional synchronisation. This driver was written based on reversed documentation, see: https://wiiubrew.org/wiki/Hardware/OTP Tested-by: Jonathan Neuschäfer # on Wii Tested-by: Emmanuel Gil Peyrot # on Wii U Signed-off-by: Emmanuel Gil Peyrot Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20210810153036.1494-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: brcm_nvram: new driver exposing Broadcom's NVRAM

2021-04-02T14:26:33Z

This driver provides access to Broadcom's NVRAM. Signed-off-by: Rafał Miłecki Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20210330111241.19401-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: Add driver to expose reserved memory as nvmem

2021-02-04T16:04:18Z

Firmware/co-processors might use reserved memory areas in order to pass data stemming from an nvmem device otherwise non accessible to Linux. For example an EEPROM memory only physically accessible to firmware, or data only accessible early at boot time. In order to expose this data to other drivers and user-space, the driver models the reserved memory area as an nvmem device. Tested-by: Tim Gover Reviewed-by: Rob Herring Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20210129171430.11328-5-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: core: remove nvmem_sysfs_get_groups()

2020-03-25T18:23:49Z

Now that we are using is_bin_visible callback, we do not need nvmem_sysfs_get_groups() anymore so move all the relevant data-structures and code to core.c Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20200325131951.31887-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: add driver for JZ4780 efuse

2020-03-19T06:41:03Z

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and nvmem cells. To fetch for example the MAC address: dd if=/sys/devices/platform/134100d0.efuse/jz4780-efuse0/nvmem bs=1 skip=34 count=6 status=none | xxd Tested-by: Mathieu Malaterre Signed-off-by: PrasannaKumar Muralidharan Signed-off-by: Mathieu Malaterre Signed-off-by: H. Nikolaus Schaller Signed-off-by: Paul Cercueil Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20200310132257.23358-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: add QTI SDAM driver

2020-01-16T19:56:49Z

QTI SDAM driver allows PMIC peripherals to access the shared memory that is available on QTI PMICs. Use subsys_initcall as PMIC SDAM NV memory is accessed by multiple PMIC drivers (charger, fuel gauge) to store/restore data across reboots required during their initialization. Signed-off-by: Anirudh Ghayal Signed-off-by: Shyam Kumar Thella Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20200116161100.30637-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman

nvmem: add Rockchip OTP driver

2019-11-05T17:35:33Z

Newer Rockchip socs like the px30 use a different one-time-programmable memory controller for things like cpu-id and leakage information, so add the necessary driver for it. Signed-off-by: Finley Xiao [ported from vendor 4.4, converted to clock-bulk API and cleanups] Signed-off-by: Heiko Stuebner Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20191029114240.14905-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman