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<title>linux-dev/drivers/pci/controller/dwc, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pci/controller/dwc?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/pci/controller/dwc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-10-05T22:32:57Z</updated>
<entry>
<title>Merge branch 'pci/qcom'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e302bafff6fa5192c8d7afe8387d7fd2a45ce799'/>
<id>urn:sha1:e302bafff6fa5192c8d7afe8387d7fd2a45ce799</id>
<content type='text'>
- List platforms that use a single MSI host interrupt in qcom DT (Johan
  Hovold)

- Add SC8280XP, SA8540P support to qcom DT binding and driver(Johan Hovold)

- Make all optional clocks truly optional in the driver (Johan Hovold)

- Rename per-IP structs to reflect the IP version (Johan Hovold)

- Sort device ID match table by compatible string (Johan Hovold)

- Add MODULE_DEVICE_TABLE to enable module autoloading (Dmitry Baryshkov)

- Drop the unused .post_deinit() callback (Johan Hovold)

- Rely on DT for clock information instead of hard-coding it in the driver
  (Manivannan Sadhasivam)

- Disable IRQs when removing driver to avoid spurious IRQs later
  (Manivannan Sadhasivam)

- Expose link transition counts via debugfs to help debug issues with
  low-power states (Manivannan Sadhasivam)

- Gate Master AXI clock to the MHI bus while in L1 substates to save power
  (Manivannan Sadhasivam)

- Disable Master AXI clock to save power when there is no traffic on PCIe
  (Manivannan Sadhasivam)

- Make the "PERST separation" debug feature optional in the DT and the
  driver (Manivannan Sadhasivam)

- Define clocks to be per-platform in DT to prepare for future SoCs
  (Manivannan Sadhasivam)

- Add SM8450 SoC support (Manivannan Sadhasivam)

- Check for platform_get_resource_byname() to avoid a NULL pointer
  dereference (Yang Yingliang)

* pci/qcom:
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  PCI: qcom: Rename host-init error label
  PCI: qcom: Drop unused post_deinit callback
  PCI: qcom-ep: Add MODULE_DEVICE_TABLE
  PCI: qcom: Sort device-id table
  PCI: qcom: Clean up IP configurations
  PCI: qcom: Make all optional clocks optional
  PCI: qcom: Add support for SA8540P
  PCI: qcom: Add support for SC8280XP
  dt-bindings: PCI: qcom: Add SA8540P to binding
  dt-bindings: PCI: qcom: Add SC8280XP to binding
  dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Check platform_get_resource_byname() return value</title>
<updated>2022-10-05T22:30:55Z</updated>
<author>
<name>Yang Yingliang</name>
<email>yangyingliang@huawei.com</email>
</author>
<published>2022-04-29T08:07:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=94f0b955e4ed610e4ee93ee72b88c4415bed685d'/>
<id>urn:sha1:94f0b955e4ed610e4ee93ee72b88c4415bed685d</id>
<content type='text'>
If platform_get_resource_byname() fails, 'mmio_res' will be set to NULL
pointer, which causes a NULL pointer dereference when it is used in
qcom_pcie_perst_deassert().

Check the return value to prevent it.

Link: https://lore.kernel.org/r/20220429080740.1294797-1-yangyingliang@huawei.com
Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver")
Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Andrew Halaney &lt;ahalaney@redhat.com&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Add support for SM8450 SoC</title>
<updated>2022-10-05T22:18:12Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=867ec26c16064b271b1d5fd292a1610ed3a754ec'/>
<id>urn:sha1:867ec26c16064b271b1d5fd292a1610ed3a754ec</id>
<content type='text'>
Add support for SM8450 SoC to the Qualcomm PCIe Endpoint Controller
driver. The driver uses the same config as the existing SDX55 chipset,
so additional settings are not required.

Link: https://lore.kernel.org/r/20220914075350.7992-13-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Make PERST separation optional</title>
<updated>2022-10-05T22:17:03Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=aa4b1753625ce97a703e71928f67bac07d9d2b55'/>
<id>urn:sha1:aa4b1753625ce97a703e71928f67bac07d9d2b55</id>
<content type='text'>
PERST separation is an optional debug feature used to collect the crash
dump from the PCIe endpoint devices by the PCIe host when the endpoint
crashes. This feature keeps the PCIe link up by separating the PCIe IP
block from the SoC reset logic.

Make the property optional in the driver.

Link: https://lore.kernel.org/r/20220914075350.7992-10-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic</title>
<updated>2022-10-05T22:15:47Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0391632948d9c1394601ae56d0cb25a1630874ed'/>
<id>urn:sha1:0391632948d9c1394601ae56d0cb25a1630874ed</id>
<content type='text'>
The Master AXI clock can be disabled when it is not used i.e., when there
is no traffic on the PCIe bus. This helps to save power during idle state.

[bhelgaas: tidy and wrap comment]
Link: https://lore.kernel.org/r/20220914075350.7992-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS</title>
<updated>2022-10-05T14:17:45Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c457ac029e443faa5886f59f849e94701375b80f'/>
<id>urn:sha1:c457ac029e443faa5886f59f849e94701375b80f</id>
<content type='text'>
During L1SS, gate the Master clock supplied to the MHI bus to save power.

Link: https://lore.kernel.org/r/20220914075350.7992-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Expose link transition counts via debugfs</title>
<updated>2022-10-05T14:17:45Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:43Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6dbba2b53c3bcbbee849d2fa8cf6acc973ab2e81'/>
<id>urn:sha1:6dbba2b53c3bcbbee849d2fa8cf6acc973ab2e81</id>
<content type='text'>
Qualcomm PCIe controllers have debug registers in the MMIO region
that count PCIe link transitions. Expose them over debugfs to
userspace to help debug the low power issues.

Link: https://lore.kernel.org/r/20220914075350.7992-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Disable IRQs during driver remove</title>
<updated>2022-10-05T14:17:27Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=19619b43f0319c7a0564f6ff35aca5f62e7cb118'/>
<id>urn:sha1:19619b43f0319c7a0564f6ff35aca5f62e7cb118</id>
<content type='text'>
Disable the Global and PERST IRQs during driver remove to avoid getting
spurious IRQs after resource deallocation.

Link: https://lore.kernel.org/r/20220914075350.7992-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Make use of the cached dev pointer</title>
<updated>2022-10-03T08:38:16Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9cf4843e1acf08ab5c523bc4fa8f7b24de2bea3a'/>
<id>urn:sha1:9cf4843e1acf08ab5c523bc4fa8f7b24de2bea3a</id>
<content type='text'>
In the qcom_pcie_ep_get_resources() function, dev pointer is already
cached in a local variable. So let's make use of it instead of getting
the dev pointer again from pdev struct.

Link: https://lore.kernel.org/r/20220914075350.7992-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: qcom-ep: Rely on the clocks supplied by devicetree</title>
<updated>2022-10-03T08:38:16Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2022-09-14T07:53:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e2efd31465b1d97a0bca6f93cb75ccdc8001c8d3'/>
<id>urn:sha1:e2efd31465b1d97a0bca6f93cb75ccdc8001c8d3</id>
<content type='text'>
Generally, device drivers should just rely on the platform data like
devicetree to supply the clocks required for the functioning of the
peripheral. There is no need to hardcode the clk info in the driver.
So get rid of the static clk info and obtain the platform supplied
clks.

The total number of clocks supplied is obtained using the
devm_clk_bulk_get_all() API and used for the rest of the clk_bulk_ APIs.

Link: https://lore.kernel.org/r/20220914075350.7992-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
</feed>
