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<title>linux-dev/drivers/pci/controller, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pci/controller?h=master</id>
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<updated>2022-11-03T15:50:28Z</updated>
<entry>
<title>PCI: hv: Fix the definition of vector in hv_compose_msi_msg()</title>
<updated>2022-11-03T15:50:28Z</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2022-10-27T20:52:56Z</published>
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<id>urn:sha1:e70af8d040d2b7904dca93d942ba23fb722e21b1</id>
<content type='text'>
The local variable 'vector' must be u32 rather than u8: see the
struct hv_msi_desc3.

'vector_count' should be u16 rather than u8: see struct hv_msi_desc,
hv_msi_desc2 and hv_msi_desc3.

Fixes: a2bad844a67b ("PCI: hv: Fix interrupt mapping for multi-MSI")
Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Cc: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Cc: Carl Vanderlip &lt;quic_carlv@quicinc.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://lore.kernel.org/r/20221027205256.17678-1-decui@microsoft.com
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"</title>
<updated>2022-10-17T17:11:09Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2022-10-17T08:40:06Z</published>
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<id>urn:sha1:897a66d281983c4fe2b805f26b315309b35fb028</id>
<content type='text'>
This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.

Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
instead of a local function in the Tegra PCI driver. This broke PCI for
some Tegra platforms because, when calculating the offset value, the mask
applied to the lower 8-bits changed from 0xff to 0xfc.

For now, fix this by reverting this commit.

Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
Link: https://lore.kernel.org/r/20221017084006.11770-1-jonathanh@nvidia.com
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2022-10-11T18:08:18Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-11T18:08:18Z</published>
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<id>urn:sha1:041bc24d867a2a577a06534d6d25e500b24a01ef</id>
<content type='text'>
Pull pci updates from Bjorn Helgaas:
 "Resource management:

   - Distribute spare resources to unconfigured hotplug bridges at
     boot-time (not just when hot-adding such a bridge), which makes
     hot-adding devices to docks work better.

   - Revert to a BAR assignment inherited from firmware only when the
     address is actually reachable via any upstream bridges, which fixes
     some cases where firmware doesn't configure all devices.

   - Add a sysfs interface to resize BARs so this can be done before
     assigning devices to a VM through VFIO.

  Power management:

   - Disable Precision Time Management for all devices on suspend to
     enable lower-power PM state. We previously did this just for Root
     Ports, which isn't enough because downstream devices can still
     generate PTM messages, which cause errors if it's disabled in the
     Root Port.

   - Save and restore the ASPM L1 PM Substates configuration for
     suspend/ resume. Previously this configuration was lost, so L1.x
     states likely stopped working after resume.

   - Check whether the L1 PM Substates Capability exists. If it didn't
     exist, we previously read junk and tried to configure L1 Substates
     based on that.

   - Fix the LTR_L1.2_THRESHOLD computation, which previously set a
     threshold for entering L1.2 that was too low in some cases.

   - Reduce the delay after transitions to or from D3cold by using
     usleep_range() rather than msleep(), which often slept for ~19ms
     instead of the 10ms normally required. The spec says 10ms is
     enough, but it's possible we could trip over devices that need a
     little more.

  Error handling:

   - Work around a BIOS bug that caused Intel Root Ports to advertise a
     Root Port Programmed I/O (RP PIO) log size of zero, which caused
     annoying warnings and prevented the kernel from dumping log
     registers for DPC errors.

  Qualcomm PCIe controller driver:

   - Add support for SC8280XP and SA8540P host controllers and SM8450
     endpoint controller.

   - Disable Master AXI clock on endpoint controllers to save power when
     link is idle or in L1.x.

   - Expose link state transition counts via debugfs to help debug
     issues with low-power states.

   - Add auto-loading module support.

  Synopsys DesignWare PCIe controller driver:

   - Remove a dependency on ZONE_DMA32 by allocating the MSI target page
     differently. There's more work to do related to eDMA controllers,
     so it's not completely settled"

* tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (71 commits)
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: Expose PCIe Resizable BAR support via sysfs
  PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation
  PCI/ASPM: Ignore L1 PM Substates if device lacks capability
  PCI/ASPM: Factor out L1 PM Substates configuration
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
  PCI/ASPM: Refactor L1 PM Substates Control Register programming
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  phy: freescale: imx8m-pcie: Fix the wrong order of phy_init() and phy_power_on()
  ...
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/misc'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=14868d783c16b2f7cd46ca1f7fe23b84cdae911d'/>
<id>urn:sha1:14868d783c16b2f7cd46ca1f7fe23b84cdae911d</id>
<content type='text'>
- Add macros for PCI Configuration Mechanism #1 and use them in the
  ftpci100, mt7621, and tegra drivers (Pali Rohár)

* remotes/lorenzo/pci/misc:
  PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
  PCI: mt7621: Use PCI_CONF1_EXT_ADDRESS() macro
  PCI: ftpci100: Use PCI_CONF1_ADDRESS() macro
  PCI: Add standard PCI Config Address macros
</content>
</entry>
<entry>
<title>Merge branch 'pci/qcom'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e302bafff6fa5192c8d7afe8387d7fd2a45ce799'/>
<id>urn:sha1:e302bafff6fa5192c8d7afe8387d7fd2a45ce799</id>
<content type='text'>
- List platforms that use a single MSI host interrupt in qcom DT (Johan
  Hovold)

- Add SC8280XP, SA8540P support to qcom DT binding and driver(Johan Hovold)

- Make all optional clocks truly optional in the driver (Johan Hovold)

- Rename per-IP structs to reflect the IP version (Johan Hovold)

- Sort device ID match table by compatible string (Johan Hovold)

- Add MODULE_DEVICE_TABLE to enable module autoloading (Dmitry Baryshkov)

- Drop the unused .post_deinit() callback (Johan Hovold)

- Rely on DT for clock information instead of hard-coding it in the driver
  (Manivannan Sadhasivam)

- Disable IRQs when removing driver to avoid spurious IRQs later
  (Manivannan Sadhasivam)

- Expose link transition counts via debugfs to help debug issues with
  low-power states (Manivannan Sadhasivam)

- Gate Master AXI clock to the MHI bus while in L1 substates to save power
  (Manivannan Sadhasivam)

- Disable Master AXI clock to save power when there is no traffic on PCIe
  (Manivannan Sadhasivam)

- Make the "PERST separation" debug feature optional in the DT and the
  driver (Manivannan Sadhasivam)

- Define clocks to be per-platform in DT to prepare for future SoCs
  (Manivannan Sadhasivam)

- Add SM8450 SoC support (Manivannan Sadhasivam)

- Check for platform_get_resource_byname() to avoid a NULL pointer
  dereference (Yang Yingliang)

* pci/qcom:
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  PCI: qcom: Rename host-init error label
  PCI: qcom: Drop unused post_deinit callback
  PCI: qcom-ep: Add MODULE_DEVICE_TABLE
  PCI: qcom: Sort device-id table
  PCI: qcom: Clean up IP configurations
  PCI: qcom: Make all optional clocks optional
  PCI: qcom: Add support for SA8540P
  PCI: qcom: Add support for SC8280XP
  dt-bindings: PCI: qcom: Add SA8540P to binding
  dt-bindings: PCI: qcom: Add SC8280XP to binding
  dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mvebu'</title>
<updated>2022-10-05T22:32:56Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fba236f96ccb3982799b54f5b26a988e4c08f562'/>
<id>urn:sha1:fba236f96ccb3982799b54f5b26a988e4c08f562</id>
<content type='text'>
- Fix endianness of emulated bridge iolimitupper, iobaseupper, memlimit and
  membase members (Pali Rohár)

* remotes/lorenzo/pci/mvebu:
  PCI: mvebu: Fix endianness when accessing PCI emul bridge members
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mediatek'</title>
<updated>2022-10-05T22:32:56Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7cb0a666998ddc5c2ca9c5dcaf916dd48c4eef0c'/>
<id>urn:sha1:7cb0a666998ddc5c2ca9c5dcaf916dd48c4eef0c</id>
<content type='text'>
- Rename the pcie-mediatek-gen3 driver from 'mtk-pcie' to 'mtk-pcie-gen3'
  so it can coexist with the pcie-mediatek driver, which also uses
  'mtk-pcie' (Felix Fietkau)

* remotes/lorenzo/pci/mediatek:
  PCI: mediatek-gen3: Change driver name to mtk-pcie-gen3
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/dwc'</title>
<updated>2022-10-05T22:32:56Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=fefb75d842494f54c7ff0931ecec66c988eff0c9'/>
<id>urn:sha1:fefb75d842494f54c7ff0931ecec66c988eff0c9</id>
<content type='text'>
- Use dmam_alloc_coherent() instead of dma_map_page() to allocate the MSI
  target page, which means dwc drivers will work even when ZONE_DMA32 is
  disabled (Will McVicker)

- If we can't allocate an MSI target page with a 32-bit address, try
  allocating one with a 64-bit address (Will McVicker)

- Switch from of_gpio_named_count() to generic gpiod_count() (Andy
  Shevchenko)

- Add support for i.MX8MP PCIe (Richard Zhu)

- Fix the Freescale i.MX8 PHY driver, which had interchanged the phy_init()
  and phy_power_on() interfaces (Richard Zhu)

* remotes/lorenzo/pci/dwc:
  phy: freescale: imx8m-pcie: Fix the wrong order of phy_init() and phy_power_on()
  PCI: imx6: Add i.MX8MP PCIe support
  PCI: dwc: Replace of_gpio_named_count() by gpiod_count()
  PCI: dwc: Drop dependency on ZONE_DMA32
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/bridge-emul'</title>
<updated>2022-10-05T22:32:55Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:55Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=84aabff88098af3121498443abe48ad489550f58'/>
<id>urn:sha1:84aabff88098af3121498443abe48ad489550f58</id>
<content type='text'>
- In an emulated PCI bridge, set Capability offsets so they match the
  hardware offsets shown by U-Boot (Pali Rohár)

* remotes/lorenzo/pci/bridge-emul:
  PCI: pci-bridge-emul: Set position of PCI capabilities to real HW value
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/apple'</title>
<updated>2022-10-05T22:32:54Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:54Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9d17becd49d168443362e54a74eeca2b174dd70c'/>
<id>urn:sha1:9d17becd49d168443362e54a74eeca2b174dd70c</id>
<content type='text'>
- Switch from gpiod_get_from_of_node() to generic devm GPIO API (Dmitry
  Torokhov)

* remotes/lorenzo/pci/apple:
  PCI: apple: Do not leak reset GPIO on unbind/unload/error
</content>
</entry>
</feed>
