<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/pci/dwc, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pci/dwc?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/pci/dwc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2018-06-08T12:50:11Z</updated>
<entry>
<title>PCI: Collect all native drivers under drivers/pci/controller/</title>
<updated>2018-06-08T12:50:11Z</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2018-05-31T01:12:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6e0832fa432ec99c94caee733c8f5851cf85560b'/>
<id>urn:sha1:6e0832fa432ec99c94caee733c8f5851cf85560b</id>
<content type='text'>
Native PCI drivers for root complex devices were originally all in
drivers/pci/host/.  Some of these devices can also be operated in endpoint
mode.  Drivers for endpoint mode didn't seem to fit in the "host"
directory, so we put both the root complex and endpoint drivers in
per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc.

These per-device directories contain trivial Kconfig and Makefiles and
clutter drivers/pci/.  Make a new drivers/pci/controllers/ directory and
collect all the device-specific drivers there.

No functional change intended.

Link: https://lkml.kernel.org/r/1520304202-232891-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>Merge tag 'pci-v4.18-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2018-06-07T19:45:58Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-06-07T19:45:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3a3869f1c443383ef8354ffa0e5fb8df65d8b549'/>
<id>urn:sha1:3a3869f1c443383ef8354ffa0e5fb8df65d8b549</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:

  - unify AER decoding for native and ACPI CPER sources (Alexandru
    Gagniuc)

  - add TLP header info to AER tracepoint (Thomas Tai)

  - add generic pcie_wait_for_link() interface (Oza Pawandeep)

  - handle AER ERR_FATAL by removing and re-enumerating devices, as
    Downstream Port Containment does (Oza Pawandeep)

  - factor out common code between AER and DPC recovery (Oza Pawandeep)

  - stop triggering DPC for ERR_NONFATAL errors (Oza Pawandeep)

  - share ERR_FATAL recovery path between AER and DPC (Oza Pawandeep)

  - disable ASPM L1.2 substate if we don't have LTR (Bjorn Helgaas)

  - respect platform ownership of LTR (Bjorn Helgaas)

  - clear interrupt status in top half to avoid interrupt storm (Oza
    Pawandeep)

  - neaten pci=earlydump output (Andy Shevchenko)

  - avoid errors when extended config space inaccessible (Gilles Buloz)

  - prevent sysfs disable of device while driver attached (Christoph
    Hellwig)

  - use core interface to report PCIe link properties in bnx2x, bnxt_en,
    cxgb4, ixgbe (Bjorn Helgaas)

  - remove unused pcie_get_minimum_link() (Bjorn Helgaas)

  - fix use-before-set error in ibmphp (Dan Carpenter)

  - fix pciehp timeouts caused by Command Completed errata (Bjorn
    Helgaas)

  - fix refcounting in pnv_php hotplug (Julia Lawall)

  - clear pciehp Presence Detect and Data Link Layer Status Changed on
    resume so we don't miss hotplug events (Mika Westerberg)

  - only request pciehp control if we support it, so platform can use
    ACPI hotplug otherwise (Mika Westerberg)

  - convert SHPC to be builtin only (Mika Westerberg)

  - request SHPC control via _OSC if we support it (Mika Westerberg)

  - simplify SHPC handoff from firmware (Mika Westerberg)

  - fix an SHPC quirk that mistakenly included *all* AMD bridges as well
    as devices from any vendor with device ID 0x7458 (Bjorn Helgaas)

  - assign a bus number even to non-native hotplug bridges to leave
    space for acpiphp additions, to fix a common Thunderbolt xHCI
    hot-add failure (Mika Westerberg)

  - keep acpiphp from scanning native hotplug bridges, to fix common
    Thunderbolt hot-add failures (Mika Westerberg)

  - improve "partially hidden behind bridge" messages from core (Mika
    Westerberg)

  - add macros for PCIe Link Control 2 register (Frederick Lawler)

  - replace IB/hfi1 custom macros with PCI core versions (Frederick
    Lawler)

  - remove dead microblaze and xtensa code (Bjorn Helgaas)

  - use dev_printk() when possible in xtensa and mips (Bjorn Helgaas)

  - remove unused pcie_port_acpi_setup() and portdrv_acpi.c (Bjorn
    Helgaas)

  - add managed interface to get PCI host bridge resources from OF (Jan
    Kiszka)

  - add support for unbinding generic PCI host controller (Jan Kiszka)

  - fix memory leaks when unbinding generic PCI host controller (Jan
    Kiszka)

  - request legacy VGA framebuffer only for VGA devices to avoid false
    device conflicts (Bjorn Helgaas)

  - turn on PCI_COMMAND_IO &amp; PCI_COMMAND_MEMORY in pci_enable_device()
    like everybody else, not in pcibios_fixup_bus() (Bjorn Helgaas)

  - add generic enable function for simple SR-IOV hardware (Alexander
    Duyck)

  - use generic SR-IOV enable for ena, nvme (Alexander Duyck)

  - add ACS quirk for Intel 7th &amp; 8th Gen mobile (Alex Williamson)

  - add ACS quirk for Intel 300 series (Mika Westerberg)

  - enable register clock for Armada 7K/8K (Gregory CLEMENT)

  - reduce Keystone "link already up" log level (Fabio Estevam)

  - move private DT functions to drivers/pci/ (Rob Herring)

  - factor out dwc CONFIG_PCI Kconfig dependencies (Rob Herring)

  - add DesignWare support to the endpoint test driver (Gustavo
    Pimentel)

  - add DesignWare support for endpoint mode (Gustavo Pimentel)

  - use devm_ioremap_resource() instead of devm_ioremap() in dra7xx and
    artpec6 (Gustavo Pimentel)

  - fix Qualcomm bitwise NOT issue (Dan Carpenter)

  - add Qualcomm runtime PM support (Srinivas Kandagatla)

  - fix DesignWare enumeration below bridges (Koen Vandeputte)

  - use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai)

  - add configfs entries for pci_epf_driver device IDs (Kishon Vijay
    Abraham I)

  - clean up pci_endpoint_test driver (Gustavo Pimentel)

  - update Layerscape maintainer email addresses (Minghuan Lian)

  - add COMPILE_TEST to improve build test coverage (Rob Herring)

  - fix Hyper-V bus registration failure caused by domain/serial number
    confusion (Sridhar Pitchai)

  - improve Hyper-V refcounting and coding style (Stephen Hemminger)

  - avoid potential Hyper-V hang waiting for a response that will never
    come (Dexuan Cui)

  - implement Mediatek chained IRQ handling (Honghui Zhang)

  - fix vendor ID &amp; class type for Mediatek MT7622 (Honghui Zhang)

  - add Mobiveil PCIe host controller driver (Subrahmanya Lingappa)

  - add Mobiveil MSI support (Subrahmanya Lingappa)

  - clean up clocks, MSI, IRQ mappings in R-Car probe failure paths
    (Marek Vasut)

  - poll more frequently (5us vs 5ms) while waiting for R-Car data link
    active (Marek Vasut)

  - use generic OF parsing interface in R-Car (Vladimir Zapolskiy)

  - add R-Car V3H (R8A77980) "compatible" string (Sergei Shtylyov)

  - add R-Car gen3 PHY support (Sergei Shtylyov)

  - improve R-Car PHYRDY polling (Sergei Shtylyov)

  - clean up R-Car macros (Marek Vasut)

  - use runtime PM for R-Car controller clock (Dien Pham)

  - update arm64 defconfig for Rockchip (Shawn Lin)

  - refactor Rockchip code to facilitate both root port and endpoint
    mode (Shawn Lin)

  - add Rockchip endpoint mode driver (Shawn Lin)

  - support VMD "membar shadow" feature (Jon Derrick)

  - support VMD bus number offsets (Jon Derrick)

  - add VMD "no AER source ID" quirk for more device IDs (Jon Derrick)

  - remove unnecessary host controller CONFIG_PCIEPORTBUS Kconfig
    selections (Bjorn Helgaas)

  - clean up quirks.c organization and whitespace (Bjorn Helgaas)

* tag 'pci-v4.18-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (144 commits)
  PCI/AER: Replace struct pcie_device with pci_dev
  PCI/AER: Remove unused parameters
  PCI: qcom: Include gpio/consumer.h
  PCI: Improve "partially hidden behind bridge" log message
  PCI: Improve pci_scan_bridge() and pci_scan_bridge_extend() doc
  PCI: Move resource distribution for single bridge outside loop
  PCI: Account for all bridges on bus when distributing bus numbers
  ACPI / hotplug / PCI: Drop unnecessary parentheses
  ACPI / hotplug / PCI: Mark stale PCI devices disconnected
  ACPI / hotplug / PCI: Don't scan bridges managed by native hotplug
  PCI: hotplug: Add hotplug_is_native()
  PCI: shpchp: Add shpchp_is_native()
  PCI: shpchp: Fix AMD POGO identification
  PCI: mobiveil: Add MSI support
  PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver
  PCI/AER: Decode Error Source Requester ID
  PCI/AER: Remove aer_recover_work_func() forward declaration
  PCI/DPC: Use the generic pcie_do_fatal_recovery() path
  PCI/AER: Pass service type to pcie_do_fatal_recovery()
  PCI/DPC: Disable ERR_NONFATAL handling by DPC
  ...
</content>
</entry>
<entry>
<title>Merge branch 'pci/kconfig'</title>
<updated>2018-06-06T21:10:49Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-06-06T21:10:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0ecda3a087462eb89c1d9227deea998d8cd014e8'/>
<id>urn:sha1:0ecda3a087462eb89c1d9227deea998d8cd014e8</id>
<content type='text'>
  - remove unnecessary host controller CONFIG_PCIEPORTBUS Kconfig
    selections (Bjorn Helgaas)

* pci/kconfig:
  PCI: Remove host driver Kconfig selection of CONFIG_PCIEPORTBUS

# Conflicts:
#	drivers/pci/dwc/Kconfig
#	drivers/pci/host/Kconfig
</content>
</entry>
<entry>
<title>Merge branch 'pci/host/qcom'</title>
<updated>2018-06-06T21:10:40Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-06-06T21:10:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=4c31ff0b3a5fe1f0012479f1c8eb3df0464e7742'/>
<id>urn:sha1:4c31ff0b3a5fe1f0012479f1c8eb3df0464e7742</id>
<content type='text'>
* pci/host/qcom:
  PCI: qcom: Include gpio/consumer.h
</content>
</entry>
<entry>
<title>Merge branch 'lorenzo/pci/host/misc'</title>
<updated>2018-06-06T21:10:33Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-06-06T21:10:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5db844eee501224f29bd67d6fea1ad4e3dd6cdde'/>
<id>urn:sha1:5db844eee501224f29bd67d6fea1ad4e3dd6cdde</id>
<content type='text'>
  - update Layerscape maintainer email addresses (Minghuan Lian)

  - add COMPILE_TEST to improve build test coverage (Rob Herring)

* lorenzo/pci/host/misc:
  MAINTAINERS: Update Layerscape PCIe driver maintainers list
  PCI: Improve host drivers compile test coverage

# Conflicts:
#	drivers/pci/dwc/Kconfig
</content>
</entry>
<entry>
<title>Merge branch 'lorenzo/pci/dwc'</title>
<updated>2018-06-06T21:10:27Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-06-06T21:10:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f03c7aa4598b78f9f0f6883f1e410f67968f74b9'/>
<id>urn:sha1:f03c7aa4598b78f9f0f6883f1e410f67968f74b9</id>
<content type='text'>
  - reduce Keystone "link already up" log level (Fabio Estevam)

  - move private DT functions to drivers/pci/ (Rob Herring)

  - factor out dwc CONFIG_PCI Kconfig dependencies (Rob Herring)

  - add DesignWare support to the endpoint test driver (Gustavo Pimentel)

  - add DesignWare support for endpoint mode (Gustavo Pimentel)

  - use devm_ioremap_resource() instead of devm_ioremap() in dra7xx and
    artpec6 (Gustavo Pimentel)

  - fix Qualcomm bitwise NOT issue (Dan Carpenter)

  - add Qualcomm runtime PM support (Srinivas Kandagatla)

* lorenzo/pci/dwc:
  PCI: qcom: add runtime pm support to pcie_port
  PCI: qcom: Fix a bitwise vs logical NOT typo
  PCI: dwc: dra7xx: Use devm_ioremap_resource() instead of devm_ioremap()
  PCI: dwc: artpec6: Use devm_ioremap_resource() instead of devm_ioremap()
  misc: pci_endpoint_test: Add DesignWare EP entry
  dt-bindings: PCI: designware: Add support for EP in DesignWare driver
  PCI: dwc: Add support for EP mode
  dt-bindings: PCI: designware: Example update
  PCI: Move private DT related functions into private header
  PCI: dwc: Move CONFIG_PCI depends to menu
  PCI: dwc: Replace magic number by defines
  PCI: dwc: Small computation improvement
  PCI: dwc: Replace lower into upper case characters
  PCI: dwc: Define maximum number of vectors
  PCI: imx6: Remove space before tabs
  PCI: keystone: Do not treat link up message as error

# Conflicts:
#	include/linux/of_pci.h
</content>
</entry>
<entry>
<title>Merge branch 'lorenzo/pci/armada8k'</title>
<updated>2018-06-06T21:10:24Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-06-06T21:10:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bdc4bb13773955d33f8fd23d79afbc95fda8dca4'/>
<id>urn:sha1:bdc4bb13773955d33f8fd23d79afbc95fda8dca4</id>
<content type='text'>
  - enable register clock for Armada 7K/8K (Gregory CLEMENT)

* lorenzo/pci/armada8k:
  PCI: armada8k: Fix clock resource by adding a register clock
  PCI: armada8k: Remove useless test before clk_disable_unprepare()
</content>
</entry>
<entry>
<title>PCI: qcom: Include gpio/consumer.h</title>
<updated>2018-06-04T17:44:16Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-05-30T21:53:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a70aa7684b9ea1ca6ebd3d040a9d94b0e60ee22a'/>
<id>urn:sha1:a70aa7684b9ea1ca6ebd3d040a9d94b0e60ee22a</id>
<content type='text'>
When CONFIG_GPIOLIB is disabled, we run into a build failure:

  drivers/pci/dwc/pcie-qcom.c: In function 'qcom_pcie_probe':
  drivers/pci/dwc/pcie-qcom.c:1223:16: error: implicit declaration of function 'devm_gpiod_get_optional'; did you mean 'devm_regulator_get_optional'? [-Werror=implicit-function-declaration]
    pcie-&gt;reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);

Including gpio/consumer.h directly is the correct fix.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</content>
</entry>
<entry>
<title>PCI: Rework of_pci_get_host_bridge_resources() to devm_of_pci_get_host_bridge_resources()</title>
<updated>2018-05-30T16:35:13Z</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2018-05-15T09:07:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5bd51b35c7cbbc98786282ada940429a33b52e17'/>
<id>urn:sha1:5bd51b35c7cbbc98786282ada940429a33b52e17</id>
<content type='text'>
of_pci_get_host_bridge_resources() allocates the resource structures it
fills dynamically, but none of its callers care to release them so far.
Rather than requiring everyone to do this explicitly, convert the existing
function to a managed version.

Tested-by: Vladimir Zapolskiy &lt;vladimir_zapolskiy@mentor.com&gt;
Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Vladimir Zapolskiy &lt;vladimir_zapolskiy@mentor.com&gt;
Acked-by: Joao Pinto &lt;jpinto@synopsys.com&gt;
Acked-by: Jingoo Han &lt;jingoohan1@gmail.com&gt;
CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>PCI: Pass struct device to of_pci_get_host_bridge_resources()</title>
<updated>2018-05-30T16:34:56Z</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2018-05-15T09:07:03Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=055f87a2a33640923d400fd5c3ebfff24198459f'/>
<id>urn:sha1:055f87a2a33640923d400fd5c3ebfff24198459f</id>
<content type='text'>
Another step towards a managed version of
of_pci_get_host_bridge_resources(): Feed in the underlying device, rather
than just the OF node.  This will allow us to use managed resource
allocation internally later on.

Tested-by: Vladimir Zapolskiy &lt;vladimir_zapolskiy@mentor.com&gt;
Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Vladimir Zapolskiy &lt;vladimir_zapolskiy@mentor.com&gt;
Acked-by: Jingoo Han &lt;jingoohan1@gmail.com&gt;
CC: Joao Pinto &lt;Joao.Pinto@synopsys.com&gt;
CC: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
</feed>
