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<title>linux-dev/drivers/pci, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pci?h=master</id>
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<updated>2022-11-03T15:50:28Z</updated>
<entry>
<title>PCI: hv: Fix the definition of vector in hv_compose_msi_msg()</title>
<updated>2022-11-03T15:50:28Z</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2022-10-27T20:52:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e70af8d040d2b7904dca93d942ba23fb722e21b1'/>
<id>urn:sha1:e70af8d040d2b7904dca93d942ba23fb722e21b1</id>
<content type='text'>
The local variable 'vector' must be u32 rather than u8: see the
struct hv_msi_desc3.

'vector_count' should be u16 rather than u8: see struct hv_msi_desc,
hv_msi_desc2 and hv_msi_desc3.

Fixes: a2bad844a67b ("PCI: hv: Fix interrupt mapping for multi-MSI")
Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Cc: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Cc: Carl Vanderlip &lt;quic_carlv@quicinc.com&gt;
Reviewed-by: Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;
Link: https://lore.kernel.org/r/20221027205256.17678-1-decui@microsoft.com
Signed-off-by: Wei Liu &lt;wei.liu@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"</title>
<updated>2022-10-17T17:11:09Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2022-10-17T08:40:06Z</published>
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<id>urn:sha1:897a66d281983c4fe2b805f26b315309b35fb028</id>
<content type='text'>
This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.

Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
instead of a local function in the Tegra PCI driver. This broke PCI for
some Tegra platforms because, when calculating the offset value, the mask
applied to the lower 8-bits changed from 0xff to 0xfc.

For now, fix this by reverting this commit.

Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
Link: https://lore.kernel.org/r/20221017084006.11770-1-jonathanh@nvidia.com
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pci-v6.1-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2022-10-15T23:36:38Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-15T23:36:38Z</published>
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<id>urn:sha1:41410965c3629367cbd0889dc0c8bddfb9e8a2d5</id>
<content type='text'>
Pull pci fix from Bjorn Helgaas:
 "Revert the attempt to distribute spare resources to unconfigured
  hotplug bridges at boot time.

  This fixed some dock hot-add scenarios, but Jonathan Cameron reported
  that it broke a topology with a multi-function device where one
  function was a Switch Upstream Port and the other was an Endpoint"

* tag 'pci-v6.1-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI: Distribute available resources for root buses, too"
</content>
</entry>
<entry>
<title>Revert "PCI: Distribute available resources for root buses, too"</title>
<updated>2022-10-14T19:27:58Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-14T18:45:45Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=5632e2beaf9d5dda694c0572684dea783d8a9492'/>
<id>urn:sha1:5632e2beaf9d5dda694c0572684dea783d8a9492</id>
<content type='text'>
This reverts commit e96e27fc6f7971380283768e9a734af16b1716ee.

Jonathan reported that this commit broke this topology, where all the space
available on bus 02 was assigned to the 02:00.0 bridge window, leaving none
for the e1000 device at 02:00.1:

  pci 0000:00:04.0: bridge window [mem 0x10200000-0x103fffff] to [bus 02-04]
  pci 0000:02:00.0: bridge window [mem 0x10200000-0x103fffff] to [bus 03-04]
  pci 0000:02:00.1: BAR 0: failed to assign [mem size 0x00020000]
  e1000 0000:02:00.1: can't ioremap BAR 0: [??? 0x00000000 flags 0x0]

Link: https://lore.kernel.org/r/20221014124553.0000696f@huawei.com
Reported-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-linus-6.1-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip</title>
<updated>2022-10-12T21:39:38Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-12T21:39:38Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=778ce723e93ee803ef5883619fe2391e00dbc209'/>
<id>urn:sha1:778ce723e93ee803ef5883619fe2391e00dbc209</id>
<content type='text'>
Pull xen updates from Juergen Gross:

 - Some minor typo fixes

 - A fix of the Xen pcifront driver for supporting the device model to
   run in a Linux stub domain

 - A cleanup of the pcifront driver

 - A series to enable grant-based virtio with Xen on x86

 - A cleanup of Xen PV guests to distinguish between safe and faulting
   MSR accesses

 - Two fixes of the Xen gntdev driver

 - Two fixes of the new xen grant DMA driver

* tag 'for-linus-6.1-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  xen: Kconfig: Fix spelling mistake "Maxmium" -&gt; "Maximum"
  xen/pv: support selecting safe/unsafe msr accesses
  xen/pv: refactor msr access functions to support safe and unsafe accesses
  xen/pv: fix vendor checks for pmu emulation
  xen/pv: add fault recovery control to pmu msr accesses
  xen/virtio: enable grant based virtio on x86
  xen/virtio: use dom0 as default backend for CONFIG_XEN_VIRTIO_FORCE_GRANT
  xen/virtio: restructure xen grant dma setup
  xen/pcifront: move xenstore config scanning into sub-function
  xen/gntdev: Accommodate VMA splitting
  xen/gntdev: Prevent leaking grants
  xen/virtio: Fix potential deadlock when accessing xen_grant_dma_devices
  xen/virtio: Fix n_pages calculation in xen_grant_dma_map(unmap)_page()
  xen/xenbus: Fix spelling mistake "hardward" -&gt; "hardware"
  xen-pcifront: Handle missed Connected state
</content>
</entry>
<entry>
<title>Merge tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2022-10-11T18:08:18Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-10-11T18:08:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=041bc24d867a2a577a06534d6d25e500b24a01ef'/>
<id>urn:sha1:041bc24d867a2a577a06534d6d25e500b24a01ef</id>
<content type='text'>
Pull pci updates from Bjorn Helgaas:
 "Resource management:

   - Distribute spare resources to unconfigured hotplug bridges at
     boot-time (not just when hot-adding such a bridge), which makes
     hot-adding devices to docks work better.

   - Revert to a BAR assignment inherited from firmware only when the
     address is actually reachable via any upstream bridges, which fixes
     some cases where firmware doesn't configure all devices.

   - Add a sysfs interface to resize BARs so this can be done before
     assigning devices to a VM through VFIO.

  Power management:

   - Disable Precision Time Management for all devices on suspend to
     enable lower-power PM state. We previously did this just for Root
     Ports, which isn't enough because downstream devices can still
     generate PTM messages, which cause errors if it's disabled in the
     Root Port.

   - Save and restore the ASPM L1 PM Substates configuration for
     suspend/ resume. Previously this configuration was lost, so L1.x
     states likely stopped working after resume.

   - Check whether the L1 PM Substates Capability exists. If it didn't
     exist, we previously read junk and tried to configure L1 Substates
     based on that.

   - Fix the LTR_L1.2_THRESHOLD computation, which previously set a
     threshold for entering L1.2 that was too low in some cases.

   - Reduce the delay after transitions to or from D3cold by using
     usleep_range() rather than msleep(), which often slept for ~19ms
     instead of the 10ms normally required. The spec says 10ms is
     enough, but it's possible we could trip over devices that need a
     little more.

  Error handling:

   - Work around a BIOS bug that caused Intel Root Ports to advertise a
     Root Port Programmed I/O (RP PIO) log size of zero, which caused
     annoying warnings and prevented the kernel from dumping log
     registers for DPC errors.

  Qualcomm PCIe controller driver:

   - Add support for SC8280XP and SA8540P host controllers and SM8450
     endpoint controller.

   - Disable Master AXI clock on endpoint controllers to save power when
     link is idle or in L1.x.

   - Expose link state transition counts via debugfs to help debug
     issues with low-power states.

   - Add auto-loading module support.

  Synopsys DesignWare PCIe controller driver:

   - Remove a dependency on ZONE_DMA32 by allocating the MSI target page
     differently. There's more work to do related to eDMA controllers,
     so it's not completely settled"

* tag 'pci-v6.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (71 commits)
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: Expose PCIe Resizable BAR support via sysfs
  PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation
  PCI/ASPM: Ignore L1 PM Substates if device lacks capability
  PCI/ASPM: Factor out L1 PM Substates configuration
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
  PCI/ASPM: Refactor L1 PM Substates Control Register programming
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  phy: freescale: imx8m-pcie: Fix the wrong order of phy_init() and phy_power_on()
  ...
</content>
</entry>
<entry>
<title>xen/pcifront: move xenstore config scanning into sub-function</title>
<updated>2022-10-07T05:36:44Z</updated>
<author>
<name>Juergen Gross</name>
<email>jgross@suse.com</email>
</author>
<published>2022-10-06T08:50:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2849752f36848359034616eb70dfc7fb14eb3cd4'/>
<id>urn:sha1:2849752f36848359034616eb70dfc7fb14eb3cd4</id>
<content type='text'>
pcifront_try_connect() and pcifront_attach_devices() share a large
chunk of duplicated code for reading the config information from
Xenstore, which only differs regarding calling pcifront_rescan_root()
or pcifront_scan_root().

Put that code into a new sub-function. It is fine to always call
pcifront_rescan_root() from that common function, as it will fallback
to pcifront_scan_root() if the domain/bus combination isn't known
yet (and pcifront_scan_root() should never be called for an already
known domain/bus combination anyway). In order to avoid duplicate
messages for the fallback case move the check for domain/bus not known
to the beginning of pcifront_rescan_root().

While at it fix the error reporting in case the root-xx node had the
wrong format.

As the return value of pcifront_try_connect() and
pcifront_attach_devices() are not used anywhere make those functions
return void. As an additional bonus this removes the dubious return
of -EFAULT in case of an unexpected driver state.

Signed-off-by: Juergen Gross &lt;jgross@suse.com&gt;
Reviewed-by: Jason Andryuk &lt;jandryuk@gmail.com&gt;
Signed-off-by: Juergen Gross &lt;jgross@suse.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'pci/misc'</title>
<updated>2022-10-05T22:32:58Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=17fc2a3f41b37596bbcf1e6b765f0620a8f34c9a'/>
<id>urn:sha1:17fc2a3f41b37596bbcf1e6b765f0620a8f34c9a</id>
<content type='text'>
- Use the for_each_pci_dev() helper instead of open-coding it (Yang
  Yingliang)

* pci/misc:
  PCI/P2PDMA: Use for_each_pci_dev() helper
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/misc'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=14868d783c16b2f7cd46ca1f7fe23b84cdae911d'/>
<id>urn:sha1:14868d783c16b2f7cd46ca1f7fe23b84cdae911d</id>
<content type='text'>
- Add macros for PCI Configuration Mechanism #1 and use them in the
  ftpci100, mt7621, and tegra drivers (Pali Rohár)

* remotes/lorenzo/pci/misc:
  PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
  PCI: mt7621: Use PCI_CONF1_EXT_ADDRESS() macro
  PCI: ftpci100: Use PCI_CONF1_ADDRESS() macro
  PCI: Add standard PCI Config Address macros
</content>
</entry>
<entry>
<title>Merge branch 'pci/qcom'</title>
<updated>2022-10-05T22:32:57Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2022-10-05T22:32:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e302bafff6fa5192c8d7afe8387d7fd2a45ce799'/>
<id>urn:sha1:e302bafff6fa5192c8d7afe8387d7fd2a45ce799</id>
<content type='text'>
- List platforms that use a single MSI host interrupt in qcom DT (Johan
  Hovold)

- Add SC8280XP, SA8540P support to qcom DT binding and driver(Johan Hovold)

- Make all optional clocks truly optional in the driver (Johan Hovold)

- Rename per-IP structs to reflect the IP version (Johan Hovold)

- Sort device ID match table by compatible string (Johan Hovold)

- Add MODULE_DEVICE_TABLE to enable module autoloading (Dmitry Baryshkov)

- Drop the unused .post_deinit() callback (Johan Hovold)

- Rely on DT for clock information instead of hard-coding it in the driver
  (Manivannan Sadhasivam)

- Disable IRQs when removing driver to avoid spurious IRQs later
  (Manivannan Sadhasivam)

- Expose link transition counts via debugfs to help debug issues with
  low-power states (Manivannan Sadhasivam)

- Gate Master AXI clock to the MHI bus while in L1 substates to save power
  (Manivannan Sadhasivam)

- Disable Master AXI clock to save power when there is no traffic on PCIe
  (Manivannan Sadhasivam)

- Make the "PERST separation" debug feature optional in the DT and the
  driver (Manivannan Sadhasivam)

- Define clocks to be per-platform in DT to prepare for future SoCs
  (Manivannan Sadhasivam)

- Add SM8450 SoC support (Manivannan Sadhasivam)

- Check for platform_get_resource_byname() to avoid a NULL pointer
  dereference (Yang Yingliang)

* pci/qcom:
  PCI: qcom-ep: Check platform_get_resource_byname() return value
  PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC
  dt-bindings: PCI: qcom-ep: Define clocks per platform
  PCI: qcom-ep: Make PERST separation optional
  dt-bindings: PCI: qcom-ep: Make PERST separation optional
  PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic
  PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
  PCI: qcom-ep: Expose link transition counts via debugfs
  PCI: qcom-ep: Disable IRQs during driver remove
  PCI: qcom-ep: Make use of the cached dev pointer
  PCI: qcom-ep: Rely on the clocks supplied by devicetree
  PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure
  PCI: qcom: Rename host-init error label
  PCI: qcom: Drop unused post_deinit callback
  PCI: qcom-ep: Add MODULE_DEVICE_TABLE
  PCI: qcom: Sort device-id table
  PCI: qcom: Clean up IP configurations
  PCI: qcom: Make all optional clocks optional
  PCI: qcom: Add support for SA8540P
  PCI: qcom: Add support for SC8280XP
  dt-bindings: PCI: qcom: Add SA8540P to binding
  dt-bindings: PCI: qcom: Add SC8280XP to binding
  dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
</content>
</entry>
</feed>
