linux-dev/drivers/phy/Kconfig, branch master

phy: usb: Add USB2.0 phy driver for Sunplus SP7021

2022-09-02T15:31:24Z

Add USB2.0 phy driver for Sunplus SP7021 Signed-off-by: Vincent Shih Link: https://lore.kernel.org/r/1658717052-26142-2-git-send-email-vincent.sunplus@gmail.com [vkoul: remove trailing line in driver file] Signed-off-by: Vinod Koul

phy: phy-can-transceiver: Add support for setting mux

2022-04-11T14:44:10Z

On some boards, for routing CAN signals from controller to transceiver, muxes might need to be set. Therefore, add support for setting the mux by reading the mux-states property from the device tree node. Signed-off-by: Aswath Govindraju Link: https://lore.kernel.org/r/20220408111316.21189-1-a-govindraju@ti.com Signed-off-by: Vinod Koul

phy: pistachio-usb: Depend on MIPS || COMPILE_TEST

2021-08-12T14:01:49Z

So it will be avilable for generic MIPS kernel. Signed-off-by: Jiaxun Yang Acked-By: Vinod Koul Signed-off-by: Thomas Bogendoerfer

phy: phy-can-transceiver: Add support for generic CAN transceiver driver

2021-06-14T05:50:17Z

The driver adds support for generic CAN transceivers. Currently the modes supported by this driver are standby and normal modes for TI TCAN1042 and TCAN1043 CAN transceivers. The transceiver is modelled as a phy with pins controlled by gpios, to put the transceiver in various device functional modes. It also gets the phy attribute max_link_rate for the usage of CAN drivers. Signed-off-by: Aswath Govindraju Acked-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20210510051006.11393-4-a-govindraju@ti.com Signed-off-by: Vinod Koul

phy: Add Sparx5 ethernet serdes PHY driver

2021-03-17T06:43:19Z

Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G interfaces available in the Sparx5 SoC. Signed-off-by: Bjarni Jonasson Signed-off-by: Steen Hegelund Reviewed-by: Andrew Lunn Reviewed-by: Alexandre Belloni Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.com Signed-off-by: Vinod Koul

phy: USB_LGM_PHY should depend on X86

2021-02-04T08:02:53Z

The Intel Lightning Mountain (LGM) USB3 USB is only present on Intel Lightning Mountain SoCs. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Lightning Mountain platform support. Fixes: 1cce8f73a561c944 ("phy: Add USB3 PHY support for Intel LGM SoC") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20210129131753.2656306-1-geert+renesas@glider.be Signed-off-by: Vinod Koul

PHY: Ingenic: Add USB PHY driver using generic PHY framework.

2020-12-05T08:09:30Z

Used the generic PHY framework API to create the PHY, this driver supoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC, X1000 SoC, X1830 SoC and X2000 SoC. Co-developed-by: 漆鹏振 (Qi Pengzhen) Signed-off-by: 漆鹏振 (Qi Pengzhen) Signed-off-by: 周琰杰 (Zhou Yanjie) Tested-by: 周正 (Zhou Zheng) Tested-by: H. Nikolaus Schaller Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20201116141906.11758-4-zhouyanjie@wanyeetech.com Signed-off-by: Vinod Koul

phy: fix USB_LGM_PHY warning & build errors

2020-09-22T14:11:43Z

Fix a Kconfig warning that is causing lots of build errors when USB_SUPPORT is not set. USB_PHY depends on USB_SUPPORT but "select" doesn't care about dependencies, so this driver should also depend on USB_SUPPORT. It should not select USB_SUPPORT. WARNING: unmet direct dependencies detected for USB_PHY Depends on [n]: USB_SUPPORT [=n] Selected by [m]: - USB_LGM_PHY [=m] Signed-off-by: Randy Dunlap Cc: Li Yin Cc: Vadivel Murugan R Cc: Kishon Vijay Abraham I Cc: Vinod Koul Link: https://lore.kernel.org/r/d1dd0ddd-3143-5777-1c63-195e1a32f237@infradead.org Signed-off-by: Vinod Koul

phy: Add USB3 PHY support for Intel LGM SoC

2020-09-11T11:42:49Z

Add support for USB PHY on Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan Reviewed-by: Philipp Zabel Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Vinod Koul

phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver

2020-06-29T13:18:00Z

Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the high speed peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This patch adds driver for that ZynqMP GT core. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Laurent Pinchart Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul